HC705RC16GRSSLASHD datasheet(110/120 Pages) NXP

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Electrical Speciﬁcations

General Release Specification

MC68HC705RC16 — Rev. 3.0

Electrical Specifications

12.6 DC Electrical Characteristics (5.0 Vdc)

Characteristic

Symbol

Min

Typ

Max

Unit

Output Voltage

LOAD = 10.0 µA

LOAD = -10.0 µA

—

DD– 0.1

—

0.1

—

Output High Voltage

LOAD –2.0 mA) Port A, Port B, Port C (1–7)

LOAD –15 mA) IRO

LOAD –4.0 mA) Port C (Bit 0)

DD –0.8

DD –0.7

DD –0.8

DD –0.2

—

Output Low Voltage

LOAD = 3.0 mA) Port A, Port B, Port C (1–7)

LOAD = 25.0 mA) IRO

LOAD = 20.0 mA) Port C (Bit 0)

—

0.2

0.4

0.8

0.4

Input High Voltage

Port A, Port B, Port C, IRQ, RESET, LPRST, OSC1

0.7xV

—V

Input Low Voltage

Port A, Port B, Port C, IRQ, RESET, LPRST, OSC1

—

0.2 x V

EPROM Programming Voltage

14.5

—

15.5

Supply Current (see Notes)

Run

Wait

Stop

25 oC

0 to +70 oC

—

3.8

0.5

0.3

5.0

1.2

µA

I/O Ports Hi-Z Leakage Current

Port A, Port B, Port C

–10

—

µA

Input Current

RESET, LPRST, IRQ, OSC1

PB0–PB7 with Pullups Enabled

(VIN = 0.2 x VDD)

PB0–PB7 with Pullups Enabled

(VIN = 0.7 x VDD)

–1

–100

–50

—

–330

–120

–700

–300

µA

Capacitance

Ports (as Input or Output)

RESET, LPRST, IRQ

OUT

INT

—

NOTES:

VDD = 5.0 Vdc ± 10%, VSS = 0 Vdc, TA = 0 °C to +70 °C, unless otherwise noted

Typical values at midpoint of voltage range, 25

°C, only represent average measurements

Wait IDD: only core timer active

Run (Operating) IDD, wait IDD: Measured using external square wave clock source (fOsc = 4.2 MHz); all inputs 0.2 V

from rail; no dc loads; less than 50 pF on all outputs; CL = 20 pF on OSC2

Wait, Stop IDD: port A and port C configured as inputs, port B configured as outputs. VIL = 0.2 V, VIH = VDD –0.2 V

Stop IDD is measured with OSC1 = VSS.

Wait IDD is affected linearly by the OSC2 capacitance.

Pullups are designed to be capable of pulling to VIH within 1 µs for a 100 pF, 4-kΩ load

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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