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STM32U545NET3QTR Datasheet(PDF) 218 Page - STMicroelectronics |
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STM32U545NET3QTR Datasheet(HTML) 218 Page - STMicroelectronics |
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218 / 283 page ![]() Electrical characteristics STM32U545xx 218/283 DS14216 Rev 1 tLATR Trigger conversion latency for regular and injected channels, without aborting the conversion PRESC = 0 3 1/fADC PRESC = 1 7 PRESC = 2 13 tLATRINJ Trigger conversion latency Injected channels aborting a regular conversion PRESC = 0 4 PRESC = 1 9 PRESC = 2 17 ts Sampling time - 5 - 814 tCONV Total conversion time (including sampling time) Resolution = N bits ts + N + 3 IDDA_D(ADC) ADC consumption on VDDA Differential mode fs = 2.5 Msps, resolution = 14 bits - 970 - µA fs = 1 Msps, resolution = 14 bits - 550 - fs = 10 ksps, resolution = 14 bits - 130 - fs = 2.5 Msps, resolution = 12 bits - 940 - fs = 2.5 Msps, resolution = 10 bits - 840 - fs = 2.5 Msps, resolution = 8bits - 730 - IDDV_D(ADC) ADC consumption on VREF+ Differential mode fs = 2.5 Msps, resolution = 14 bits - 140 - µA fs = 1 Msps, resolution = 14 bits -80 - fs = 10 ksps, resolution = 14 bits -13 - fs = 2.5 Msps, resolution = 12 bits - 140 - fs = 2.5 Msps, resolution = 10 bits - 140 - fs = 2.5 Msps, resolution = 8bits - 120 - Table 103. 14-bit ADC1 characteristics(1)(2) (continued) Symbol Parameter Conditions Min Typ Max Unit |
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