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STM32U545NET3QTR Datasheet(PDF) 214 Page - STMicroelectronics |
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STM32U545NET3QTR Datasheet(HTML) 214 Page - STMicroelectronics |
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214 / 283 page ![]() Electrical characteristics STM32U545xx 214/283 DS14216 Rev 1 3. Specified by design. Not tested in production. 4. FT_t I/O characteristics are degraded in VBAT mode (refer to Table 99). 5. Compensation system enabled. Table 98. Output AC characteristics for FT_c I/Os(1)(2) Speed Symbol Parameter Conditions Min Max Unit 00 Fmax Maximum frequency All I/Os, CL = 50 pF, 2.7 V ≤ VDDIOx ≤ 3.6 V - 10 MHz All I/Os, CL = 50 pF, 1.58 V ≤ VDDIOx < 2.7 V - 5 tr/tf Output rise and fall time All I/Os, CL = 50 pF, 2.7 V ≤ VDDIOx ≤ 3.6 V - 33 ns All I/Os, CL = 50 pF, 1.58 V ≤ VDDIOx < 2.7 V - 66 01 Fmax Maximum frequency All I/Os, CL = 50 pF, 2.7 V ≤ VDDIOx ≤ 3.6 V - 25 MHz All I/Os, CL = 50 pF, 1.58 V ≤ VDDIOx < 2.7 V - 10 tr/tf Output rise and fall time All I/Os, CL = 50 pF, 2.7 V ≤ VDDIOx ≤ 3.6 V - 13 ns All I/Os, CL = 50 pF, 1.58 V ≤ VDDIOx < 2.7 V - 33 1x Fmax Maximum frequency All I/Os, CL = 50 pF, 2.7 V ≤ VDDIOx ≤ 3.6 V - 40 MHz All I/Os, CL = 50 pF, 1.58 V ≤ VDDIOx < 2.7 V - 20 tr/tf Output rise and fall time All I/Os, CL = 50 pF, 2.7 V ≤ VDDIOx ≤ 3.6 V - 8 ns All I/Os, CL = 50 pF, 1.58 V ≤ VDDIOx < 2.7 V - 17 1. Specified by design. Not tested in production. 2. The I/O speed is configured using the OSPEEDRy[1:0] bits. Refer to the product reference manual for a description of GPIO port configuration register. Table 99. Output AC characteristics for FT_t I/Os in VBAT mode, and for FT_o I/Os(1) Symbol Parameter Conditions Min Max Unit Fmax Maximum frequency CL = 50 pF, 2.7 V ≤ VBAT ≤ 3.6 V, VDD off - 0.5 MHz CL = 50 pF, 1.58 V ≤ VBAT < 2.7 V, VDD off - 0.25 tr/tf Output rise and fall time CL = 50 pF, 2.7 V ≤ VBAT ≤ 3.6 V, VDD off - 400 ns CL = 50 pF, 1.58 V ≤ VBAT < 2.7 V, VDD off - 900 1. Specified by design. Not tested in production. |
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