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STM32C011F6U6 Datasheet(PDF) 62 Page - STMicroelectronics |
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STM32C011F6U6 Datasheet(HTML) 62 Page - STMicroelectronics |
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62 / 94 page ![]() Electrical characteristics STM32C011x4/x6 62/94 DS13866 Rev 3 5.3.13 I/O port characteristics General input/output characteristics Unless otherwise specified, the parameters given in Table 49 are derived from tests performed under the conditions summarized in Table 23: General operating conditions. All I/Os are designed as CMOS- and TTL-compliant. Table 49. I/O static characteristics Symbol Parameter Conditions Min Typ Max Unit VIL(1) I/O input low level voltage All 2 V < VDDIO1 < 3.6 V - - 0.3 x VDDIO1 V VIH(1) I/O input high level voltage All 2 V < VDDIO1 < 3.6 V 0.7 x VDDIO1 -- V Vhys(2) I/O input hysteresis - - 200 - mV Ilkg(3) Input leakage current(3) 0 < VIN ≤ VDDIO1 --70 - nA VDDIO1 ≤ VIN ≤ VDDIO1 +1 V - 600 - VDDIO1 +1 V ≤ VIN - 150 - RPU Weak pull-up equivalent resistor (4) VIN = VSS 25 40 55 kΩ RPD Weak pull-down equivalent resistor(4) VIN = VDDIO1 25 40 55 kΩ CIO I/O pin capacitance - - 5 - pF 1. Refer to Figure 17: I/O input characteristics. 2. Specified by design – Not tested in production. 3. This parameter represents the pad leakage of the I/O itself. The total product pad leakage is provided by the following formula: ITotal_Ileak_max = 10 μA + [number of I/Os where VIN is applied on the pad] ₓ Ilkg(Max). 4. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This PMOS/NMOS contribution to the series resistance is minimal (~10% order). |
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