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STM32C011F6U6 Datasheet(PDF) 76 Page - STMicroelectronics |
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STM32C011F6U6 Datasheet(HTML) 76 Page - STMicroelectronics |
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76 / 94 page ![]() Electrical characteristics STM32C011x4/x6 76/94 DS13866 Rev 3 Figure 23. SPI timing diagram - slave mode and CPHA = 1 1. Measurement points are done at CMOS levels: 0.3 VDD and 0.7 VDD. Figure 24. SPI timing diagram - master mode 1. Measurement points are set at CMOS levels: 0.3 VDD and 0.7 VDD. MSv41659V1 NSS input CPHA=1 CPOL=0 CPHA=1 CPOL=1 MISO output MOSI input tsu(SI) th(SI) tw(SCKL) tw(SCKH) tsu(NSS) tc(SCK) ta(SO) tv(SO) First bit OUT Next bits OUT Next bits IN Last bit OUT th(SO) tr(SCK) tf(SCK) th(NSS) tdis(SO) First bit IN Last bit IN CPHA=0 MOSI OUTPUT MISO INPUT CPHA=0 LSB OUT LSB IN CPOL=0 CPOL=1 BIT1 OUT NSS input tc(SCK) tw(SCKH) tw(SCKL) tr(SCK) tf(SCK) th(MI) High CPHA=1 CPHA=1 CPOL=0 CPOL=1 tsu(MI) tv(MO) th(MO) MSB IN BIT6 IN MSB OUT ai14136c |
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