R16DS0137EU0100 Rev.1.0

Page 5

Apr 13, 2021

RAA210040 Datasheet

2.

Pin Information

2.1

Pin Assignments

2.2

Pin Descriptions

Top View

Pin

Number

Pin

Name

Function

1

PGND

Power ground. Connect it close to the (-) terminals of the external input capacitors and output capacitors.

2

FB

Voltage setting pin. The module output voltage is set by an external resistor divider connected to FB. With

a properly selected divider, the output voltage is set to any voltage between 0.6V and 5V. Renesas also

recommends placing a ceramic capacitor in parallel to ensure system stability at extreme operating

conditions. Table 1 lists the resistor and capacitor values for various typical output voltages.

3

COMP

Compensation pin. COMP is the output of the transconductance error amplifier. For most applications,

directly connect COMP to VIN to select internal compensation to stabilize the system and achieve an

optimal transient response. For applications where external compensation is required, connect COMP to

SGND with an external compensation network.

4

SGND

Signal ground. Must connect it to EPAD for proper electrical performance.See Layout Guidelines for more

information.

5

VOUT

Power output of the module. Place the output capacitors as close as possible to the module output. See

Layout Guidelines for more information.

6

FS

Frequency selection pin. This pin sets the module switching frequency by connecting a resistor to SGND.

The frequency of operation can be programmed between 500kHz to 4MHz. The default frequency is

2MHz if FS is connected to VIN.

7

EN

Module enable pin. Enable the module by driving EN high. Shuts down the module and discharge the

output capacitor when driven low. Typically tied to VIN directly. Note: Do not leave this pin floating.

8

SYNC

Synchronization pin. Connect to logic high or the input voltage (VIN) for PWM mode. Drive with a 500kHz

to 4MHz square wave for external synchronization. Note: Do not leave this pin floating.

9

PG

Power-good pin. Power-good is an open-drain output. Use a 10kΩ to 100kΩ pull-up resistor connected

between VIN and PG. During power-up or EN start-up, the PG rising edge is delayed by 1ms after the

output is in regulation.

10

VIN

Power input of the module. Tie directly to the input rail between 2.7V~5.5V. Note: You must place

minimum total 2x22µF X7R input ceramic capacitors as close as possible to the module input. Add

additional capacitance if possible. See Layout Guidelines for more information.

-

EPAD

Power ground. Must connect it to SGND for proper electrical performance. Place as many vias as

possible under the EPAD for optimal thermal performance.

PGND

VIN

COMP

PG

SGND

VOUT

EN

SYNC

FS

FB

1

2

3

4

56

7

8

9

10

EPAD

3mm

1.7mm

3mm