SLG51002C datasheet(25/36 Pages) RENESAS

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SLG51002

PMIC with High PSRR, Low Noise, Multi-Output LDOs

and Integrated Load Switches

Datasheet

Revision 3.1

12-Sep-2022

CFR0011-120-00

25 of 35

3.9

LDO_LV Characteristics

The characteristics for the LDOs in Load Switch Mode are given in Section 3.9.1

Table 13: LDO_LV (LDO6, 7 and 8) Electrical Characteristics

Parameter

Description

Conditions

Min

Typ

Max

Unit

External Electrical Conditions

VIN

Input supply (pass device +

part of controller)

0.8

1.25

1.5

COUT

Output capacitance

Effective capacitance after

derating

Note 1

μF

ESLCOUT

Output capacitor series

inductance

f > 100 kHz

IOUT_MAX

Maximum output current

LDO6, 7

VOUT drops 50 mV

1000

Note 2

Maximum output current

LDO8

VOUT drops 50 mV

1300

Note 2

Programmable Conditions

VOUT

Selectable output voltage

0.5

Note 3

1.175

1.4

VOUT_LSB

LSB of output voltage

programming DAC (8-bit

control)

Slew rate, programmable to

(1, 2.5, 5, 7.5, 10, 12.5, 25,

50, 100) mV/us

Note 4

VOUT = VOUT (Typ)

100

mV/μs

IOUT_STARTUP

_LIM

Start-up current limit,

programmable in 29.2 mA

steps LDO6, 7

Note 5

At 90 % VOUT

29.2

321.2

1430.8

Start-up current limit,

programmable in 29.2 mA

steps LDO8

Note 5

At 90 % VOUT

29.2

321.2

1693.6

IOUT_FUNC_LI

Functional current limit,

programmable in 29.2 mA

steps LDO6, 7

Note 5

29.2

1255.6

1430.8

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