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ADF7021 Datasheet(PDF) 40 Page - Analog Devices |
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ADF7021 Datasheet(HTML) 40 Page - Analog Devices |
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40 / 44 page ![]() ADF7021 Preliminary Technical Data Rev. PrI | Page 40 of 44 REGISTER 12—SWD/THRESHOLD SETUP REGISTER DATA PACKET LENGTH CONTROL BITS LOCK THRESHOLD MODE 0 THRESHOLD FREE RUNNING 1 LOCK THRESHOLD AFTER NEXT SYNCWORD 2 LOCK THRESHOLD AFTER NEXT SYNCWORD FOR DATA_PACKET_LENGTH NUMBER OF BYTES 3 LOCK THRESHOLD DATA PACKET LENGTH 0 INVALID 1 1 BYTE ... ... 255 255 BYTES INTUPT/LOCK PIN MODE 0 INTUPT PIN LOW 1 INTUPT PIN HIGH AFTER NEXT SYNCWORD 2 INTUPT PIN HIGH AFTER NEXT SYNCWORD FOR DATA_PACKET_LENGTH NUMBER OF BYTES 3 INTUPT PIN HIGH Figure 44. Register 12—SWD/Threshold Setup Register Notes • Lock threshold locks the threshold of the envelope detector. This has the effect of locking the slicer in linear demod and also locking the AFC and AGC loops. |
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