MPC821 datasheet(216/242 Pages) NXP

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MPC860TFADS Daughter Board Design Specification—Rev 0.1

MOTOROLA

PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE

102

RS_EN2~

O, L

RS232 port 1 Enable. Connected to BCSR1. See

TABLE 4-10.

“BCSR1 Description” on page 49. In the motherboard

documentation.

103

SHIFT_C

I/O, X

MPC821’s or MPC823’s PD3/SHIFT/CLK or MPC860s’ PD3/

RRJECT4~. Not used on the FADS. Appears also at P8. On

MPC823 or MPC821 daughter boards appears also at a

dedicated LCD connector. On MPC823 daughter board used as

Video Clock input.

104

GND

105

106

HSYNC

I/O, X

MPC821’s or MPC823’s PD4/LOAD/HSYNC or MPC860s’ PD4/

RRJECT3~. Not used on the FADS. Appears also at P8. On

MPC823 or MPC821 daughter boards appears also at a

dedicated LCD connector. On MPC823 daughter board used as

HSYNC for the video encoder.

107

VSYNC

I/O, X

MPC821’s or MPC823’s PD5/FRAME/VSYNC or MPC860s’ PD5/

RRJECT2~. Not used on the FADS. Appears also at P8. On

MPC823 or MPC821 daughter boards appears also at a

dedicated LCD connector. On MPC823 daughter board used as

FIELD signal for the video encoder.

108

GND

109

110

LOE

I/O, X

MPC821’s or MPC823’s PD6/LCD_AC/LOE or MPC860s’ PD6/

RTS4~. Not used on the FADS. Appears also at P8. On MPC823

or MPC821 daughter boards appears also at a dedicated LCD

connector. On the MPC823 daughter board used also as

BLANK~ signal for the video encoder.

111

FETHRST~

O, L

Fast Ethernet Reset. When this pin active (LOW) signal is being

asserted the Fast ethernet tranceiver is being reset.

112

FETHCFG1

O, H

Fast Ethernet CFG1 signal When the LXT970 is in auto

negotiation this pin determines operating speed advertisement

capability in combination with MF4. see See the LXT970

documentation.

When auto negotiation is disabled this input enables 10Mbps link

test function and directly affects bit 19.8.

When this pin is high, 10Mbps link test is disabled 19.8 = 1.

When this pin is low, 10Mbps link test is enabled 19.8 = 0.

113

LD0

I/O, X

MPC821’s or MPC823’s PD7/LD0 or MPC860s’ PD7/RTS3~. Not

used on the FADS. Appears also at P8. On MPC823 or MPC821

daughter boards appears also at a dedicated LCD connector. On

MPC823 daughter board used as video data 7.

114

LD1

MPC821’s or MPC PD8/LD1 or MPC860s’ PD8/TXD4. Not used

on the FADS. Appears also at P8. On MPC823 or MPC821

daughter boards appears also at a dedicated LCD connector. On

MPC823 daughter board used as video data 6.

TABLE 5-11. PM3 Interconnect Signals

Pin No.

Signal Name

Attribute

Description

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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