DSPIC30F datasheet(213/220 Pages) MICROCHIP

213 / 220 page

 2004 Microchip Technology Inc.

Preliminary

DS70116C-page 211

dsPIC30F5011/5013

External Interrupt Requests ................................................ 43

Fast Context Saving............................................................ 43

Flash Program Memory ...................................................... 45

I/O Pin Specifications

Input .......................................................................... 174

Output ....................................................................... 175

I/O Ports .............................................................................. 57

Parallel (PIO) .............................................................. 57

I2C 10-bit Slave Mode Operation ........................................ 91

Reception.................................................................... 91

Transmission............................................................... 91

I2C 7-bit Slave Mode Operation .......................................... 91

Reception.................................................................... 91

Transmission............................................................... 91

I2C Master Mode Operation ................................................ 93

Baud Rate Generator.................................................. 94

Clock Arbitration.......................................................... 94

Multi-Master Communication, Bus Collision and

Bus Arbitration .................................................... 94

Reception.................................................................... 93

Transmission............................................................... 93

I2C Master Mode Support ................................................... 93

I2C Module .......................................................................... 89

Addresses ................................................................... 91

Bus Data Timing Characteristics

Master Mode ..................................................... 196

Slave Mode ....................................................... 198

Bus Data Timing Requirements

Master Mode ..................................................... 197

Slave Mode ....................................................... 199

Bus Start/Stop Bits Timing Characteristics

Master Mode ..................................................... 196

Slave Mode ....................................................... 198

General Call Address Support .................................... 93

Interrupts..................................................................... 92

IPMI Support ............................................................... 93

Operating Function Description .................................. 89

Operation During CPU Sleep and Idle Modes ............ 94

Pin Configuration ........................................................ 89

Programmer’s Model................................................... 89

Registers..................................................................... 89

Slope Control .............................................................. 93

Software Controlled Clock Stretching (STREN = 1).... 92

Various Modes ............................................................ 89

I2S Mode Operation .......................................................... 124

Data Justification....................................................... 124

Frame and Data Word Length Selection................... 124

Idle Current (IIDLE) ............................................................ 170

In-Circuit Serial Programming (ICSP) ......................... 45, 135

Input Capture (CAPX) Timing Characteristics .................. 186

Input Capture Module ......................................................... 77

Interrupts..................................................................... 78

Input Capture Operation During Sleep and Idle Modes ...... 78

CPU Idle Mode............................................................ 78

CPU Sleep Mode ........................................................ 78

Input Capture Timing Requirements ................................. 186

Input Change Notification Module ....................................... 61

dsPIC30F5011 Register Map (Bits 15-8) .................... 61

dsPIC30F5011 Register Map (Bits 7-0) ...................... 61

dsPIC30F5013 Register Map (Bits 15-8) .................... 61

dsPIC30F5013 Register Map (Bits 7-0)...................... 61

Instruction Addressing Modes ............................................ 33

File Register Instructions ............................................ 33

Fundamental Modes Supported ................................. 33

MAC Instructions ........................................................ 34

MCU Instructions ........................................................ 33

Move and Accumulator Instructions ........................... 34

Other Instructions ....................................................... 34

Instruction Set

Overview................................................................... 154

Summary .................................................................. 151

Internal Clock Timing Examples ....................................... 180

Interrupt Controller

Interrupt Priority .................................................................. 40

Traps .......................................................................... 41

Interrupt Sequence ............................................................. 43

Interrupt Stack Frame ................................................. 43

Interrupts ............................................................................ 39

Load Conditions................................................................ 178

Low Voltage Detect (LVD) ................................................ 146

Low-Voltage Detect Characteristics.................................. 175

LVDL Characteristics ........................................................ 176

Memory Organization ......................................................... 21

Core Register Map ..................................................... 30

Modes of Operation

Disable...................................................................... 107

Initialization ............................................................... 107

Listen All Messages.................................................. 107

Listen Only................................................................ 107

Loopback .................................................................. 107

Normal Operation ..................................................... 107

Modulo Addressing ............................................................. 34

Applicability................................................................. 36

Incrementing Buffer Operation Example .................... 35

Start and End Address ............................................... 35

W Address Register Selection .................................... 35

MPLAB ASM30 Assembler, Linker, Librarian ................... 160

MPLAB ICD 2 In-Circuit Debugger ................................... 161

MPLAB ICE 2000 High-Performance Universal

In-Circuit Emulator................................................... 161

MPLAB ICE 4000 High-Performance Universal

In-Circuit Emulator................................................... 161

MPLAB Integrated Development Environment Software.. 159

MPLINK Object Linker/MPLIB Object Librarian ................ 160

NVM

OC/PWM Module Timing Characteristics ......................... 187

Operating Current (IDD) .................................................... 167

Operating Frequency vs Voltage

dsPIC30FXXXX-20 (Extended) ................................ 166

Oscillator

Configurations .......................................................... 138

Fail-Safe Clock Monitor .................................... 140

Fast RC (FRC).................................................. 139

Initial Clock Source Selection ........................... 138

Low Power RC (LPRC)..................................... 139

LP Oscillator Control......................................... 138

DSPIC30F Datasheet(PDF) 213 Page - Microchip Technology

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