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SLG47502V Datasheet(PDF) 8 Page - Renesas Technology Corp |
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SLG47502V Datasheet(HTML) 8 Page - Renesas Technology Corp |
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8 / 192 page ![]() Datasheet 28-Feb-2023 CFR0011-120-00 Revision 2.3 8 of 194 © 2023 Renesas Electronics Corporation SLG47512/13 Low Voltage GreenPAK Programmable Mixed-Signal Matrix Preliminary 2 Pinout 2.1 PIN CONFIGURATION - STQFN- 12L Pin # Pin Name Pin Functions 1 VDD Power Supply 2 GPI GPI, SLA_0 3 GPIO0 GPIO, I2C SCL 4 GPIO1 GPIO, I2C SDA 5 GPIO2 GPIO with OE, EXT_OSC1_IN 6 GPIO3 GPIO with OE, EXT_Vref0, SLA_1 7 GND Ground 8 GPIO4 GPIO with OE, EXT_Vref1, SLA_2 9 GPIO5 GPIO with OE, Vref_OUT, TS_OUT 10 GPIO6 GPIO with OE, ACMP0_H+ 11 GPIO7 GPIO with OE, ACMP1_H+ 12 GPIO8 GPIO with OE, SLA_3, EXT_OSC0_IN OE: Output Enable ACMPx+: ACMPx Positive Input ACMPx-: ACMPx Negative Input I2C SCL: I2C Clock Input I2C SDA: I2C Data Input/Output Vref: Voltage Reference Output EXT_CLKx: External Clock Input SLA: Slave Address TS_OUT: Temperature Output Legend: 1 2 3 4 5 6 7 8 9 10 11 12 VDD GPI GPIO0 GPIO1 GND GPIO4 GPIO5 GPIO6 STQFN-12L (Top View) |
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