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MC68340 Datasheet(PDF) 153 Page - Freescale Semiconductor, Inc

Part # MC68340
Description  Integrated Processor with DMA User?셲 Manual
PDF  441 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MC68340 Datasheet(HTML) 153 Page - Freescale Semiconductor, Inc

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MC68340 USER’S MANUAL
MOTOROLA
Table 5-2. Instruction Set Summary
Opcode
Operation
Syntax
ABCD
Source 10 + Destination10 + X ⇒ Destination
ABCD Dy,Dx
ABCD –(Ay),–(Ax)
ADD
Source + Destination
⇒ Destination
ADD
〈ea〉,Dn
ADD Dn,
〈ea〉
ADDA
Source + Destination
⇒ Destination
ADDA
〈ea〉,An
ADDI
Immediate Data + Destination
⇒ Destination
ADDI #
〈data〉,〈ea〉
ADDQ
Immediate Data + Destination
⇒ Destination
ADDQ #
〈data〉,〈ea〉
ADDX
Source + Destination + X
⇒ Destination
ADDX Dy,Dx
ADDX –(Ay),–(Ax)
AND
Source
Λ Destination ⇒ Destination
AND
〈ea〉,Dn
AND Dn,
〈ea〉
ANDI
Immediate Data
Λ Destination ⇒ Destination
ANDI #
〈data〉,〈ea〉
ANDI to CCR
Source
Λ CCR ⇒ CCR
ANDI #
〈data〉,CCR
ANDI to SR
If supervisor state
the Source
Λ SR ⇒ SR
else TRAP
ANDI #
〈data〉,SR
ASL,ASR
Destination Shifted by
〈count〉 ⇒ Destination
ASd Dx,Dy
ASd #
〈data〉,Dy
ASd
〈ea〉
Bcc
If (condition true) then PC + d
⇒ PC
Bcc
〈label〉
BCHG
~(
〈number〉 of Destination) ⇒ Z;
~(
〈number〉 of Destination) ⇒ 〈bit number〉 of
Destination
BCHG Dn,
〈ea〉
BCHG #
〈data〉,〈ea〉
BCLR
~(
〈number〉 of Destination) ⇒ Z;
0
⇒ 〈bit number〉 of Destination
BCLR Dn,
〈ea〉
BCLR #
〈data〉,〈ea〉
BGND
If (background mode enabled) then
enter background mode
else Format/Vector offset
⇒ –(SSP)
PC
⇒ –(SSP)
SR
⇒ –(SSP)
(Vector)
⇒ PC
BGND
BKPT
Run breakpoint acknowledge cycle;
TRAP as illegal instruction
BKPT #
〈data〉
BRA
PC + d
⇒ PC
BRA
〈label〉
BSET
~(
〈number〉 of Destination) ⇒ Z;
1
⇒ 〈bit number〉 of Destination
BSET Dn,
〈ea〉
BSET #
〈data〉,〈ea〉
BSR
SP – 4
⇒ SP; PC ⇒ (SP); PC + d ⇒ PC
BSR
〈label〉
BTST
– (
〈number〉 of Destination) ⇒ Z;
BTST Dn,
〈ea〉
BTST #
〈data〉,〈ea〉
CHK
If Dn < 0 or Dn > Source then TRAP
CHK
〈ea〉,Dn
CHK2
If Rn < lower bound or
If Rn > upper bound
then TRAP
CHK2
〈ea〉,Rn
CLR
0
⇒ Destination
CLR
〈ea〉
CMP
Destination — Source
⇒ cc
CMP
〈ea〉,Dn
CMPA
Destination — Source
CMPA
〈ea〉,An
CMPI
Destination — Immediate Data
CMPI #
〈data〉,〈ea〉
CMPM
Destination — Source
⇒ cc
CMPM (Ay)+,(Ax)+
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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