MC68340 datasheet(157/441 Pages) FREESCALE

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5- 20

MC68340 USER’S MANUAL

MOTOROLA

5.3.3.1 CONDITION CODE REGISTER. The CCR portion of the SR contains five bits that

indicate the result of a processor operation. Table 5-3 lists the effect of each instruction on

these bits. The carry bit and the multiprecision extend bit are separate in the M68000

Family to simplify programming techniques that use them. Refer to Table 5-7 as an

example.

Table 5-3. Condition Code Computations

Operations

Special Definition

ABCD

C = Decimal Carry

Z = Z

Λ R

∂Λ ... Λ R0

ADD, ADDI, ADDQ

V = Sm

Λ Dm Λ R

∂ V S∂ Λ D∂ Λ Rm

C = Sm

Λ Dm V R

∂ Λ Dm V Sm Λ R∂

ADDX

V = Sm

Λ Dm Λ R

∂ V S∂ Λ D∂ Λ Rm

C = Sm

Λ Dm V R

∂ Λ Dm V Sm Λ R∂

Z = Z

Λ R

∂ Λ ... Λ R0

AND, ANDI, EOR, EORI,

MOVEQ, MOVE, OR,

ORI, CLR, EXT, NOT,

TAS, TST

—

CHK

—

CHK2, CMP2

—

Z = (R = LB) V

(R = UB)

C = (LB < UB)

Λ (IR < LB) V (R > UB) V

(UB < LB) Λ (R > UB) Λ (R < LB)

SUB, SUBI, SUBQ

V =

∂ Λ Dm Λ R∂ V Sm Λ D∂ Λ Rm

C = Sm

Λ D

∂ V Rm Λ D∂ V Sm Λ Rm

SUBX

V =

∂ Λ Dm Λ R∂ V Sm Λ D∂ Λ Rm

C = Sm

Λ D

∂ V Rm Λ D∂ V Sm Λ Rm

Z = Z

Λ R

∂ Λ ... Λ R0

CMP, CMPI, CMPM

—

V =

∂ Λ Dm Λ R∂ V Sm Λ D∂ Λ Rm

C = Sm

Λ D

∂ V Rm Λ D∂ V Sm Λ Rm

DIVS, DIVU

—

V = Division Overflow

MULS, MULU

—

V = Multiplication Overflow

SBCD, NBCD

C = Decimal Borrow

Z = Z

Λ R

∂ Λ ... Λ R0

NEG

V = Dm

Λ Rm

C = Dm V Rm

NEGX

V = Dm

Λ Rm

C = Dm V Rm

Z = Z

Λ R

∂ Λ ... Λ R0

ASL

V = Dm

Λ (D

∂ – 1 V ... V D∂ – r) V D∂ Λ

(Dm–1 V

... + Dm – r)

C =

∂ – r + 1

ASL (r = 0)

—

LSL, ROXL

***0

C = Dm – r + 1

LSR (r = 0)

—

ROXL (r = 0)

—

C = X

ROL

—

C = Dm – r + 1

ROL (r = 0)

—

ASR, LSR, ROXR

***0

C = Dr – 1

ASR, LSR (r = 0)

—

ROXR (r = 0)

—

C = X

Freescale Semiconductor, Inc.

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