RT600 datasheet(52/171 Pages) NXP

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RT600

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Product data sheet

Rev. 2.1 — 7 July 2023

52 of 173

NXP Semiconductors

RT600

Dual-core microcontroller with 32-bit Cortex-M33 and Xtensa HiFi4

Audio DSP CPUs

10. Functional description

10.1 Architectural overview

The ARM Cortex-M33 includes two AHB-Lite buses, the system bus and the C-code bus.

The use of two core buses allows for simultaneous operations if concurrent operations

target different devices.

A multi-layer AHB matrix connects the CPU buses and other bus masters to peripherals in

a flexible manner that optimizes performance by allowing peripherals on different slaves

ports of the matrix to be accessed simultaneously by different bus masters. More

information on the multilayer matrix can be found in Section 10.12.1. Connections in the

multilayer matrix are shown in Figure 3. Note that while the AHB bus itself supports word,

halfword, and byte accesses, not all AHB peripherals need or provide that support.

10.2 Arm Cortex-M33 processor

The Cortex-M33 is a general purpose 32-bit microprocessor, which offers high

performance and very low power consumption. The Cortex-M33 offers an instruction set

based on Thumb®-2, low interrupt latency, interruptible/continuable multiple load and

store instructions, automatic state save and restore for interrupts, tightly integrated

interrupt controller, multiple core buses capable of simultaneous accesses, and a floating

point unit.

The RT600 includes the Armv8-M Security Extension that adds security through code and

data protection features.

Information about Cortex-M33 configuration options can be found in the user manual.

10.3 Arm Cortex-M33 integrated Floating Point Unit (FPU)

The FPU fully supports single-precision add, subtract, multiply, divide, multiply and

accumulate, and square root operations. It also provides conversions between fixed-point

and floating-point data formats, and floating-point constant instructions.

The FPU provides floating-point computation functionality that is compliant with the

ANSI/IEEE Std 754-2008, IEEE Standard for Binary Floating-Point Arithmetic, referred to

as the IEEE 754 standard.

10.4

Xtensa HiFi 4 advanced Audio Digital Signal Processor

The HiFi 4 Audio Engine is present on selected RT600 devices. The HiFi 4 is a highly

optimized audio processor geared for efficient execution of audio and voice codecs and

pre- and post-processing modules. It includes support for four 32x32-bit MACs, some

support for 72-bit accumulators, limited ability to support eight 32x16-bit MACs, and the

ability to issue two 64-bit loads per cycle. There is an floating point unit included, providing

up to four single-precision IEEE floating point MACs per cycle. The HiFi 4 Audio Engine is

a configuration option of the Xtensa LX6 processor. All HiFi 4 Audio Engine operations

can be used as intrinsics in standard C/C++ applications.

Information about HiFi 4 DSP configuration options can be found in the user manual.

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