RT600 datasheet(87/171 Pages) NXP

87 / 171 page

RT600

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 2.1 — 7 July 2023

87 of 173

NXP Semiconductors

RT600

Dual-core microcontroller with 32-bit Cortex-M33 and Xtensa HiFi4

Audio DSP CPUs

10.21.3 SHA-1 and SHA-2

The Hash peripheral is used to perform SHA-1 and SHA-2 (256) based hashing. A hash

takes an arbitrarily large message or image and forms a relatively small fixed size

“unique” number called a digest. The data is fed by words from the processor, DMA, or

hosted access; the words are converted from little-endian (Arm standard) to big-endian

(SHA standard) by the block.

10.21.3.1 Features

• Used with an HMAC to support a challenge/response or to validate a message.

• Can be used to verify external memory that has not been compromised.

10.21.4 PUF

The PUF controller provides a secure key storage without injecting or provisioning device

unique PUF root key.

10.21.4.1 Features

• Key strength of 256 bits. The PUF constructs 256-bit strength device unique PUF root

key using the digita fingerprint of a device derived from SRAM and error correction

data called Activation Code (AC). The AC is generated during enrollment process and

must be stored on external non-volatile memory device in the system.

• Generation, storage, and reconstruction of keys.

• Key sizes from 64 bits to 4096 bits.PUF controller allows storage of keys, generated

externally or on chip, of sizes 64 bits to 4096 bits

• PUF controller allows to assign a 4-bit index value for each key while generating key

codes. Keys that are assigned index value zero are output through HW bus,

accessible to AES engine and OTFAD block only. Keys with non-zero index are

available through APB register interface

10.21.5 CASPER co-processor

The Cryptographic Accelerator (CASPER) engine provides acceleration of asymmetric

cryptographic algorithms. When the Cryptographic Accelerator (CASPER) is used in

conjunction with hardware blocks for hashing and symmetric cryptography, significant

performance can be achieved. Supported crypto functions are implemented in the SDK

(Software Development Kit) and the mbed TLS examples utilize the CASPER peripheral

for computations.

10.21.6 Random Number Generator (RNG)

Random Number Generators (RNG) are used for cryptographic, modeling, and simulation

applications, which employ keys that must be generated in a random fashion.

10.21.7 On-the-Fly Decryption on Octal/Quad SPI interface (OTFAD)

The OTFAD function provides AES-128 Counter Mode On-the-Fly Decryption of external

data located on the Quad/octal SPI flash interface (QuadSPI) interface.

RT600 Datasheet(PDF) 87 Page - NXP Semiconductors

RT600 Datasheet(HTML) 87 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL