MCP3910 datasheet(46/90 Pages) MICROCHIP

46 / 90 page

MCP3910

DS20005116D-page 46

 2012-2020 Microchip Technology Inc.

FIGURE 6-1:

Control Byte.

The default device Address bits are A[6:5] = 01

(contact the Microchip factory for other available device

address bits). For more information, see the Product

Identification System

section. The register map is

defined in Table 9-1.

6.3

Reading from the Device

The first register read on the SDO pin is the one defined

by the address (A[4:0]) given in the control byte. After

this first register is fully transmitted, if the CS pin is

maintained logic low, the communication continues with-

out an additional control byte and the SDO pin transmits

another register with the address automatically

incremented.

Four different Read mode configurations can be defined

through the READ[1:0] bits in the STATUSCOM register

for the address increment (see Section 6.5 “Continu-

ous Communications, Looping on Register Sets”

and Table 9-2). The data on SDO are clocked out of the

MCP3910 on the falling edge of SCK. The reading

format for each register is defined in Section 5.5 “ADC

Output Coding”

FIGURE 6-2:

Read on a Single Register with 24-Bit Format (WIDTH_DATA[1:0] = 01,

SPI Mode 1,1).

FIGURE 6-3:

Read on a Single Register with 24-Bit Format (WIDTH_DATA[1:0] = 01,

SPI Mode 0,0).

A[6]

A[5]

A[4]

A[3]

A[2]

A[1]

A[0]

R/W

Device

Address

Read/

Write

READ Communication (SPI mode 1,1)

Don’t care

SCK

SDI

SDO

DATA<0>

Hi-Z

Device latches SDI on rising edge

Device latches SDO on falling edge

R/W

High Z

READ Communication (SPI mode 0,0)

Don’t care

SCK

SDI

SDO

DATA<23>

Hi-Z

Device latches SDI on rising edge

Device latches SDO on falling edge

High Z

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