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WM8216SEFL/R Datasheet(PDF) 4 Page - Wolfson Microelectronics plc |
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WM8216SEFL/R Datasheet(HTML) 4 Page - Wolfson Microelectronics plc |
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4 / 27 page  WM8216 Production Data w PD Rev 4.0 March 2007 4 PIN DESCRIPTION PIN NAME TYPE DESCRIPTION 1 RSMP Digital input Reset sample pulse (when CDS=1) or clamp control (CDS=0) 2 MCLK Digital input Master (ADC) clock. This clock determines the ADC conversion rate. 3 DGND Supply Digital ground. 4 SEN Digital input Enables the serial interface when high. 5 DVDD2 Supply Digital supply, all digital I/O pins. 6 SDI Digital input Serial data input. 7 SCK Digital input Serial clock. 8 NC No connect No internal connection. 9 NC No connect No internal connection. Digital output data bus. ADC output data (d9:d0) is available in 10-bit parallel format. 10 OP[0] Digital output d0 (LSB) 11 OP[1] Digital output d1 12 OP[2] Digital output d2 13 OP[3] Digital output d3 14 OP[4] Digital output d4 15 OP[5] Digital output d5 16 OP[6] Digital output d6 17 OP[7] Digital output d7 18 OP[8] Digital output d8 19 OP[9]/SDO Digital output d9 (MSB) Alternatively, pin OP[9]/SDO may be used to output register read-back data when OEB=0, OPD(register bit)=0 and SEN has been pulsed high. See Serial Interface description in Device Description section for further details. 20 AVDD Supply Analogue supply. This must be operated at the same potential as DVDD1. 21 AGND1 Supply Analogue ground. 22 VRB Analogue output Lower reference voltage. This pin must be connected to AGND via a decoupling capacitor. 23 VRT Analogue output Upper reference voltage. This pin must be connected to AGND via a decoupling capacitor. 24 VRX Analogue output Input return bias voltage. This pin must be connected to AGND via a decoupling capacitor. 25 VRLC/VBIAS Analogue I/O Selectable analogue output voltage for RLC or single-ended bias reference. This pin would typically be connected to AGND via a decoupling capacitor. VRLC can be externally driven if programmed Hi-Z. 26 TEST Analogue I/O Used for test purposes only. Do not externally connect – leave this pin floating. 27 EINP Analogue input Even channel input video. 28 OINP Analogue input Odd channel input video. 29 AGND2 Supply Analogue ground. 30 DVDD1 Supply Digital supply for logic and clock generator. This must be operated at the same potential as AVDD. 31 OEB Digital input Output Hi-Z control. All digital outputs set to high-impedance state when input pin OEB=1 or register bit OPD=1. 32 VSMP Digital input Video sample pulse. |
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