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WM8216SEFL/R Datasheet(PDF) 19 Page - Wolfson Microelectronics plc |
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WM8216SEFL/R Datasheet(HTML) 19 Page - Wolfson Microelectronics plc |
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19 / 27 page ![]() WM8216 Production Data w PD Rev 4.0 March 2007 19 REFERENCES The ADC reference voltages are derived from an internal band-gap reference, and buffered to pins VRT and VRB, where they must be decoupled to ground. Pin VRX is driven by a similar buffer, and also requires decoupling. The output buffer from the RLCDAC also requires decoupling at pin VRLC/VBIAS. The ADC references can be switched from the default values (VRT=2.05V, VRB=1.05V, ADC input range=2V) to give a smaller ADC reference range (VRT=1.85V, VRB=1.25V, ADC input range=1.2V) under control of the LOWREFS register bit. Setting LOWREFS=1 allows smaller input signals to be accommodated. Note: When LOWREFS = 1 the output of the RLCDAC will scale if RLCDACRNG = 1. The max output from RLCDAC will change from 2.05 to 1.85V and the step size will proportionally reduce. POWER MANAGEMENT Power management for the device is performed via the Control Interface. By default the device is fully enabled. The EN bit allows the device to be fully powered down when set low. Individual blocks can be powered down using the bits in Setup Register 5. When in MONO mode the unused input channels are automatically disabled to reduce power consumption. CONTROL INTERFACE The internal control registers are programmable via the serial digital control interface. The register contents can be read back via the serial interface on pin OP[9]/SDO. It is recommended that a software reset is carried out after the power-up sequence, before writing to any other register. This ensures that all registers are set to their default values (as shown in Table 5). SERIAL INTERFACE: REGISTER WRITE Figure 15 shows register writing in serial mode. Three pins, SCK, SDI and SEN are used. A six-bit address (a5, 0, a3, a2, a1, a0) is clocked in through SDI, MSB first, followed by an eight-bit data word (b7, b6, b5, b4, b3, b2, b1, b0), also MSB first. Setting address bit a4 to 0 indicates that the operation is a register write. Each bit is latched on the rising edge of SCK. When the data has been shifted into the device, a pulse is applied to SEN to transfer the data to the appropriate internal register. SCK SEN SDI a5 0 a3a2a1 a0b7b6b5 b4b3b2b1b0 Address Data Word Figure 15 Serial Interface Register Write A software reset is carried out by writing to Address “000100” with any value of data, (i.e. Data Word = XXXXXXXX). |
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