WM8940_07 datasheet(56/85 Pages) WOLFSON

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WM8940

Pre-Production

Pre-Production, Rev 3.0, February 2007

INTEGER N DIVISION

The integer division ratio (N) is determined by N[3:0] and must be in the range 5 to 12.

If the PLL frequency is an exact integer (5,6,7,8,9,10,11,12) then FRAC_EN can be set to 0 for low

power operation.

INPUT CLOCK

(PLL_IN)

DESIRED PLL OUTPUT

(PLL_OUT)

DIVISION

REQUIRED (X)

FRACTIONAL

DIVISION (K)

INTEGER

DIVISION (N)

SDM

11.2896MHz

90.3168MHz

12.288MHz

98.304MHz

Table 48 PLL Modes of Operation (Integer N mode)

FRACTIONAL K MODE

The Fractional K bits provides K[23:0] provide finer divide resolution for the PLL frequency ratio (up

to 1/224). If these are used then FRAC_EN must be set. The relationship between the required

division X, the fractional division K[23:0] and the integer division N[3:0] is:

K = 2

23 ( X – N)

where 0 < (X – N) < 1 and K is rounded to the nearest whole number.

For example, if the PLL input clock (PLL_IN) is 13MHz and the desired PLL output clock (PLLCLK)

is 98.304MHz then the desired division, X, is 7.561800. So N[3:0] will be 7h and K[23:0] will be

23F400h to produce the desired 98.304MHz clock.

The PLL performs best when f2 is around 90MHz. Its stability peaks at N=8. Some example settings

are shown in Table 49.

MCLK

(MHz)

(F1)

DESIRED

OUTPUT

(MHz)

PRESCALE

DIVIDE

POSTSCALE

DIVIDE

(FIXED)

(Hex)

11.29

90.3168

MCLK/2

7.5264

86C220

12.288

98.304

MCLK/2

8.192

3126E8

11.29

90.3168

MCLK/2

6.947446

F28BD4

12.288

98.304

MCLK/2

7.561846

8FD525

14.4

11.29

90.3168

MCLK/2

6.272

45A1CA

14.4

12.288

98.304

MCLK/2

6.826667

D3A06E

19.2

11.29

90.3168

MCLK/4

9.408

6872AF

19.2

12.288

98.304

MCLK/4

10.24

3D70A3

19.68

11.29

90.3168

MCLK/4

9.178537

2DB492

19.68

12.288

98.304

MCLK/4

9.990243

FD809F

19.8

11.29

90.3168

MCLK/4

9.122909

1F76F7

19.8

12.288

98.304

MCLK/4

9.929697

EE009E

11.29

90.3168

MCLK/4

7.5264

86C226

12.288

98.304

MCLK/4

8.192

3126E8

11.29

90.3168

MCLK/4

6.947446

F28BD4

12.288

98.304

MCLK/4

7.561846

8FD525

11.29

90.3168

MCLK/4

6.690133

BOAC93

12.288

98.304

MCLK/4

7.281778

482296

Table 49 PLL Frequency Examples

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