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EMC6D103 Datasheet(PDF) 59 Page - SMSC Corporation

Part # EMC6D103
Description  Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features
PDF  92 Pages
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Manufacturer  SMSC [SMSC Corporation]
Direct Link  http://www.smsc.com
Logo SMSC - SMSC Corporation

EMC6D103 Datasheet(HTML) 59 Page - SMSC Corporation

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Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features
Datasheet
SMSC EMC6D103
59
Revision 0.3 (03-01-07)
DATASHEET
8.2.7
Register 3Eh: Company ID
The Company ID register contains the company identification number. This number is a method for
uniquely identifying the part manufacturer.
This register is read only – a write to this register has no effect.
8.2.8
Register 3Fh: Version / Stepping
The four least significant bits of the Version / Stepping register [3:0] contain the current stepping of the
EMC6D103 silicon. Stepping numbers are to begin from a value of 08h, to indicate that the register
set is enhanced from previous hardware monitoring standards. The four most significant bits [7:4]
reflect the version number, which will be fixed at 0110b. For the A0 stepping of this device, the register
will read 01101000b. For the A1 stepping, this register will read 01101001b.
The register is used by application software to identify which device has been implemented in the given
system. Based on this information, software can determine which registers to read from and write to.
Further, application software may use the current stepping to implement work-arounds for bugs found
in a specific silicon stepping. This register is read only – a write to this register has no effect.
8.2.9
Register 40h: Ready/Lock/Start Monitoring
Setting the Lock bit makes the Lock bit read only.
Table 8.11 Register 3Eh: Company ID
Register
Address
Read/
Write
Register Name
Bit 7
(MSb)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSb)
Default
Value
3Eh
R
Company ID
7
6
5
4
3
2
1
0
5Ch
Table 8.12 Register 3Fh: Version / Stepping
Register
Address
Read/
Write
Register Name
Bit 7
(MSb)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSb)
Default
Value
3Fh
R
Version / Stepping
VER3
VER
2
VER
1
VER
0
STP
3
STP
2
STP
1
STP0
68h
Table 8.13 Register 40h: Ready/Lock/Start Monitoring
Register
Address
Read/
Write
Register Name
Bit 7
(MSb)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSb)
Default
Value
40h
R/W
Ready/Lock/Start
RES
RES
RES
RES
OVRID
READY
LOCK
START
00h



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