EMC6D103 datasheet(63/92 Pages) SMSC

63 / 92 page

Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features

Datasheet

SMSC EMC6D103

Revision 0.3 (03-01-07)

DATASHEET

The remote diode fault bits do not clear on a read while the fault condition exists. If the start bit is set

when a fault condition occurs, 80h will be loaded into the associated temperature reading register,

which will cause the associated diode limit error bit to be set (Remote Diode 1 Limit Error or Remote

Diode 2 Limit Error) in addition to the diode fault bit. Disabling the enable bit for the diode will clear

both the fault bit and the error bit for that diode (see Note below).

This register is read only – a write to this register has no effect.

Note: Clearing the individual enable bits.

1. An interrupt status bit will never change from a 0 to a 1 when the corresponding individual interrupt

enable bit is cleared (set to 0), regardless of whether the limits are violated during a measurement.

2. If the individual enable bit is cleared while the associated status bit is 1, the status bit will be

cleared when the associated reading register is updated. The reading registers only get updated

when the START bit is set to ‘1’. If the enable bit is cleared when the START bit is 0, the associated

interrupt status bit will not be cleared until the start bit is set to 1 and the associated reading register

is updated.

8.2.12

The VID register contains the values of EMC6D103 VID0-VID4 input pins. This register indicates the

status of the VID lines that interconnect the processor to the Voltage Regulator Module (VRM).

Table 8.18 Interrupt Status Register 2

BIT

NAME

R/W DEFAULT

DESCRIPTION

+12v_Error

The EMC6D103 automatically sets this bit to 1 when the 12V input

voltage is less than or equal to the limit set in the 12V Low Limit register

or greater than the limit set in the 12V High Limit register.

Reserved

TACH1

Slow/Stalled

The EMC6D103 automatically sets this bit to 1 when the TACH1 input

reading is above the value set in the Tach1 Minimum MSB and LSB

registers.

TACH2

Slow/Stalled

The EMC6D103 automatically sets this bit to 1 when the TACH2 input

reading is above the value set in the Tach2 Minimum MSB and LSB

registers.

TACH3

Slow/Stalled

The EMC6D103 automatically sets this bit to 1 when the TACH3 input

reading is above the value set in the Tach3 Minimum MSB and LSB

registers.

TACH4

Slow/Stalled

The EMC6D103 automatically sets this bit to 1 when the TACH4 input

reading is above the value set in the Tach4 Minimum MSB and LSB

registers.

Remote

Diode 1 Fault

The EMC6D103 automatically sets this bit to 1 when there is either a

short or open circuit fault on the Remote1+ or Remote1- thermal diode

input pins as defined in the section Diode Fault on page 26.

Note:

If the START bit is set and a fault condition exists, the Remote

Diode 1 reading register will be forced to 80h.

Remote

Diode 2 Fault

The EMC6D103 automatically sets this bit to 1 when there is either a

short or open circuit fault on the Remote2+ or Remote2- thermal diode

input pins as defined in the section Diode Fault on page 26.

Note:

If the START bit is set and a fault condition exists, the Remote

Diode 2 reading register will be forced to 80h.

Table 8.19 Register 43h: VID

Address

Read/

Write

Bit 7

(MSb)

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

(LSb)

Default

Value

43h

VID0-4

RES

VID4

VID3

VID2

VID1

VID0

N/A

EMC6D103 Datasheet(PDF) 63 Page - SMSC Corporation

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