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P83C524 Datasheet(PDF) 40 Page - NXP Semiconductors |
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P83C524 Datasheet(HTML) 40 Page - NXP Semiconductors |
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40 / 76 page  1997 Dec 15 40 Philips Semiconductors Product specification 8-bit microcontrollers P83C524; P80C528; P83C528 15 IDLE AND POWER-DOWN OPERATION Idle mode operation permits the interrupt, serial ports and timer blocks to function while the CPU is halted. The following functions remain active during Idle mode. These functions may generate an interrupt or reset and thus end the Idle mode: • Timer 0, Timer 1, Timer 2, Watchdog Timer • UART, I2C-Interface • External interrupt The Power-down operation freezes the oscillator. The Power-down mode can only be activated by setting the PD bit in the PCON register (see Fig.20). Fig.20 Internal Idle and Power-down clock configuration. handbook, full pagewidth MBC477 - 1 OSCILLATOR CLOCK GENERATOR interrupts serial ports timer blocks CPU IDL PD XTAL1 XTAL2 |
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