CD4440CS datasheet(7/20 Pages) PHILIPS

7 / 20 page

1996 Dec 20

Philips Semiconductors

Product speciﬁcation

Analog voice scrambler/descrambler

PCD4440T

7.2

Power supply (VDD, VSS)

The positive supply of the circuit (VDD) must meet the

voltage requirement as indicated in the characteristics.

To avoid undefined states of the device at power-on, an

internal reset circuit clears the logic. The power-on reset

has the highest priority; it blocks and resets the complete

circuit.

7.3

Oscillator (OSCI)

The time base for the PCD4440T is a 3.58 MHz input

signal which can be derived from the oscillator output

(OSCO) of Philips microcontroller families PCD33xxA or

PCF84CxxxA. Figure 4 shows the OSCI connection.

7.4

Splitting frequency and mode selection

Table 1 shows the input codes required to select the

various splitting frequencies, and the mute, transparent

and scramble/descramble modes. The codes form part of

the serial I2C-bus message input on the SDA line from the

microcontroller.

Table 1

Input data codes for splitting frequency and mode selection; note 1

Notes

1. Input codes other than shown in the table are not allowed.

2. Oscillator frequency = 3.58 MHz.

HEX

APPLICATION

fs(2) (Hz)

000101

Mute mode

−

001002

Select fs

2641

001103

Select fs

1853

010004

Select fs

1507

010105

Select fs

1279

011006

Select fs

1117

011107

Select fs

1018

100008

Select fs

899

100109

Select fs

837

10100A

Select fs

767

10110B

Transparent mode

−

11110F

Start scramble/descramble mode

−

handbook, full pagewidth

MGG731

27 pF

PCD4440T

PCD33xxA

PCF84CxxxA

MICROCONTROLLER

OSCI

3.58 MHz

OSCO

Fig.4 OSCI (oscillator input) connection.

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