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AT91 Datasheet(PDF) 23 Page - ATMEL Corporation |
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AT91 Datasheet(HTML) 23 Page - ATMEL Corporation |
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23 / 153 page  23 AT91X40 Series 1354D–ATARM–08/02 Data Bus Width A data bus width of 8 or 16 bits can be selected for each chip select. This option is con- trolled by the DBW field in the EBI_CSR (Chip Select Register) for the corresponding chip select. Figure 9 shows how to connect a 512K x 8-bit memory on NCS2. Figure 9. Memory Connection for an 8-bit Data Bus Figure 10 shows how to connect a 512K x 16-bit memory on NCS2. Figure 10. Memory Connection for a 16-bit Data Bus EBI D0 - D7 D8 - D15 A1 - A18 A0 NWR0 NRD NCS2 D0 - D7 A1 - A18 A0 Write Enable Output Enable Memory Enable NWR1 EBI D0 - D7 D8 - D15 A1 - A19 NLB NWE NOE NCS2 D0 - D7 D8 - D15 A0 - A18 Low Byte Enable Write Enable Output Enable Memory Enable NUB High Byte Enable |
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