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AT91 Datasheet(PDF) 37 Page - ATMEL Corporation |
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AT91 Datasheet(HTML) 37 Page - ATMEL Corporation |
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37 / 153 page ![]() 37 AT91X40 Series 1354D–ATARM–08/02 Figures 26 through 32 show the timing cycles and wait states for read and write access to the various AT91X40 Series external memory devices. The configurations described are shown in the following table: Table 5. Memory Access Waveforms Figure Number Number of Wait States Bus Width Size of Data Transfer 26 0 16 Word 27 1 16 Word 28 1 16 Half-word 29 0 8 Word 30 1 8 Half-word 31 1 8 Byte 32 0 16 Byte |
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