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AT25FS040 Datasheet(PDF) 8 Page - ATMEL Corporation

Part # AT25FS040
Description  High Speed Small Sectored SPI Flash Memory
PDF  23 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT25FS040 Datasheet(HTML) 8 Page - ATMEL Corporation

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AT25FS040
5107D–SFLSH–09/06
protection employed. These bits are set by using the WRSR instruction. During internal
write cycles, all other commands will be ignored except the RDSR instruction.
READ PRODUCT ID (RDID): The RDID instruction allows the user to read the manufac-
turer ID byte followed by two device ID bytes. The manufacturer ID is assigned by
JEDEC and is 1Fh for Atmel (see Table 8). The first device ID byte indicates the mem-
ory type (66h=AT25FS040) followed by the device memory capacity byte (04h). For
maximum compatibility and flexibility, two RDID opcodes (9Fh and ABh) are supported
and will perform the same operation.
The device is first selected by driving Chip Select (CS) low then the RDID opcode is
shifted in on Serial In (SI) during rising edge of clock. The 24-bit Manufacturer and
Device Identification Codes stored in memory are clocked out on Serial Output (SO)
starting on the falling edge of clock (see Figure 15). If CS stays low after the last bit of
second device ID byte is shifted out, the manufacturer ID and 2 byte device ID will con-
tinue to be clocked out until CS goes high. The RDID sequence is terminated any time
CS is driven high and the device will go into standby mode.
WRITE STATUS REGISTER (WRSR): The WRSR instruction allows the user to select
one of eight levels of protection for the AT25FS040. The AT25FS040 is divided into
eight blocks where the top 1/64, 1/32, 1/16, 1/8, top quarter (1/4), top half (1/2), or all of
the memory blocks can be protected (locked out) from write. Any of the locked-out
blocks will therefore be READ only. The locked-out sector/block and the corresponding
status register control bits are shown in Table 9 on page 9.
Table 6. Status Register Format
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
WPEN
BP4
BP3
BP2
BP1
BP0
WEN
RDY
Table 7. Read Status Register Bit Definition
Bit
Definition
Bit 0 (RDY)
Bit 0 = 0 (RDY) indicates the device is READY. Bit 0 = 1 indicates the
write cycle is in progress.
Bit 1 (WEN)
Bit 1 = 0 indicates the device is not WRITE ENABLED. Bit 1 = 1 indicates
the device is WRITE ENABLED.
Bit 2 (BP0)
See Table 9.
Bit 3 (BP1)
See Table 9.
Bit 4 (BP2)
See Table 9.
Bit 5 (BP3)
See Table 9.
Bit 6 (BP4)
See Table 9.
Bit 7 (WPEN)
See Table 10.
Bits 0-7 are 1s during an internal write cycle.
Table 8. Read Product ID (RDID)
Manufacturer ID
Device ID
Memory Type
Memory Capacity
1Fh
66h
04h



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