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MSC8144 Datasheet(PDF) 64 Page - Freescale Semiconductor, Inc |
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MSC8144 Datasheet(HTML) 64 Page - Freescale Semiconductor, Inc |
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64 / 80 page  MSC8144 Quad Core Digital Signal Processor Data Sheet, Rev. 1 Freescale Semiconductor 64 Figure 42 Shows the boundary scan (JTAG) timing diagram. Figure 43 Shows the test access port timing diagram Figure 44 Shows the TRST timing diagram. Figure 42. Boundary Scan (JTAG) Timing Figure 43. Test Access Port Timing Figure 44. TRST Timing TCK (Input) Data Inputs Data Outputs Data Outputs Input Data Valid Output Data Valid tBSXKH tBSVKH tTCKHOV tTCKHOZ TCK (Input) TDI (Input) TDO (Output) TDO (Output) Input Data Valid Output Data Valid TMS tTDIVKH tTDIXKH tTDOHOV tTDOHOZ TRST (Input) tTRST |
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