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AD5142ABCPZ100-RL7 Datasheet(PDF) 27 Page - Analog Devices

Part # AD5142ABCPZ100-RL7
Description  Dual Channel, 128-/256-Position, I2C, Nonvolatile Digital Potentiometer
PDF  29 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5142ABCPZ100-RL7 Datasheet(HTML) 27 Page - Analog Devices

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Data Sheet
AD5122A/AD5142A
THEORY OF OPERATION
analog.com
Rev. D | 27 of 29
mode, the output voltage is dependent mainly on the ratio of the
internal resistors, RAW and RWB, and not the absolute values.
Therefore, the temperature drift reduces to 5 ppm/°C.
TERMINAL VOLTAGE OPERATING RANGE
The AD5122A/AD5142A are designed with internal ESD diodes
for protection. These diodes also set the voltage boundary of the
terminal operating voltages. Positive signals present on Terminal
A, Terminal B, or Terminal W that exceed VDD are clamped by the
forward-biased diode. There is no polarity constraint between VA,
VW, and VB, but they cannot be higher than VDD or lower than VSS.
Figure 44. Maximum Terminal Voltages Set by VDD and VSS
POWER-UP SEQUENCE
Because there are diodes to limit the voltage compliance at Termi-
nal A, Terminal B, and Terminal W (see Figure 44), it is important to
power up VDD first before applying any voltage to Terminal A, Termi-
nal B, and Terminal W. Otherwise, the diode is forward-biased such
that VDD is powered unintentionally. The ideal power-up sequence
is VSS, VDD, VLOGIC, digital inputs, and VA, VB, and VW. The order
of powering VA, VB, VW, and digital inputs is not important as long
as they are powered after VSS, VDD, and VLOGIC. Regardless of
the power-up sequence and the ramp rates of the power supplies,
once VDD is powered, the power-on preset activates, which restores
EEPROM values to the RDAC registers.
LAYOUT AND POWER SUPPLY BIASING
It is always a good practice to use a compact, minimum lead length
layout design. Ensure that the leads to the input are as direct as
possible with a minimum conductor length. Ground paths should
have low resistance and low inductance. It is also good practice to
bypass the power supplies with quality capacitors. Apply low equiv-
alent series resistance (ESR) 1 µF to 10 µF tantalum or electrolytic
capacitors at the supplies to minimize any transient disturbance and
to filter low frequency ripple. Figure 45 illustrates the basic supply
bypassing configuration for the AD5122A/AD5142A.
Figure 45. Power Supply Bypassing



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