AD5142ABCPZ10-RL7 datasheet(10/29 Pages) AD

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Data Sheet

AD5122A/AD5142A

ABSOLUTE MAXIMUM RATINGS

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Rev. D | 10 of 29

TA = 25°C, unless otherwise noted.

Table 5.

Parameter

Rating

VDD to GND

−0.3 V to +7.0 V

VSS to GND

+0.3 V to −7.0 V

VDD to VSS

7 V

VLOGIC to GND

−0.3 V to VDD + 0.3 V or

+7.0 V (whichever is less)

VA, VW, VB to GND

VSS − 0.3 V, VDD + 0.3 V

+7.0 V (whichever is less)

IA, IW, IB

Pulsed1

Frequency > 10 kHz2

RAW = 10 kΩ

±6 mA/d

RAW = 100 kΩ

±1.5 mA/d

Frequency ≤ 10 kHz2

RAW = 10 kΩ

±6 mA/√d

RAW = 100 kΩ

±1.5 mA/√d

Digital Inputs

−0.3 V to VLOGIC + 0.3 V or

+7 V (whichever is less)

Operating Temperature Range, TA3

−40°C to +125°C

Maximum Junction Temperature,

150°C

TJ Maximum

Storage Temperature Range

−65°C to +150°C

Reflow Soldering

Peak Temperature

260°C

Time at Peak Temperature

20 sec to 40 sec

Package Power Dissipation

(TJ max − TA)/θJA

1 Maximum terminal current is bounded by the maximum current handling of the

switches, maximum power dissipation of the package, and maximum applied

voltage across any two of the A, B, and W terminals at a given resistance.

2 d = pulse duty factor.

3 Includes programming of EEPROM memory.

Stresses at or above those listed under Absolute Maximum Ratings

may cause permanent damage to the product. This is a stress

rating only; functional operation of the product at these or any other

conditions above those indicated in the operational section of this

specification is not implied. Operation beyond the maximum operat-

ing conditions for extended periods may affect product reliability.

THERMAL RESISTANCE

Thermal performance is directly linked to printed circuit board

(PCB) design and operating environment. Careful attention to PCB

thermal design is required.

θJA is the junction to ambient thermal resistance, measured in a

JEDEC natural convection environment.

θJB is the junction to board thermal resistance, measured at a point

on the board 1mm from the package edge, along the package

center line, measured in a JEDEC θJB environment.

Table 6. Thermal Resistance

Package Type1

θJA

θJB

Unit

16-Lead LFCSP

75.4

33.4

°C/W

16-Lead TSSOP

134.43

No Data

°C/W

1 Thermal impedance simulated values are based on a JEDEC 2S2P thermal

test board. See JEDEC JESD-51.

ELECTROSTATIC DISCHARGE (ESD) RATINGS

The following ESD information is provided for handling of ESD-sen-

sitive devices in and ESD-protected area only.

Human body model (HBM) per ANSI/ESDA/JEDEC JS-001.

Field induced charged device model (FICDM) and charged device

model (CDM) per ANSI/ESDA/JEDEC JS-002.

ESD RATINGS FOR AD5122A/AD5142A

Table 7. AD5122A/AD5142A, 16-Lead TSSOP and 16-Lead LFCSP

ESD Model

Withstand Threshold

(V)

Class

HBM

4000

FICDM

1250

Table 8. AD5122AW/AD5142AW, 16-Lead LFCSP

ESD Model

Withstand Threshold

(V)

Class

HBM

2000

FICDM

1250

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Charged devi-

ces and circuit boards can discharge without detection. Although

this product features patented or proprietary protection circuitry,

damage may occur on devices subjected to high energy ESD.

Therefore, proper ESD precautions should be taken to avoid

performance degradation or loss of functionality.

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