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AD5142ABCPZ10-RL7 Datasheet(PDF) 18 Page - Analog Devices

Part # AD5142ABCPZ10-RL7
Description  Dual Channel, 128-/256-Position, I2C, Nonvolatile Digital Potentiometer
PDF  29 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5142ABCPZ10-RL7 Datasheet(HTML) 18 Page - Analog Devices

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Data Sheet
AD5122A/AD5142A
THEORY OF OPERATION
analog.com
Rev. D | 18 of 29
The AD5122A/AD5142A digital programmable potentiometers are
designed to operate as true variable resistors for analog signals
within the terminal voltage range of VSS < VTERM < VDD. The resis-
tor wiper position is determined by the RDAC register contents. The
RDAC register acts as a scratchpad register that allows unlimited
changes of resistance settings. A secondary register (the input shift
register) can be used to preload the RDAC register data.
The RDAC register can be programmed with any position setting
using the I2C interface. When a desirable wiper position is found,
this value can be stored in the EEPROM memory. Thereafter, the
wiper position is always restored to that position for subsequent
power-ups. The storing of EEPROM data takes approximately 15
ms; during this time, the device is locked and does not acknowl-
edge any new command, preventing any changes from taking
place.
RDAC REGISTER AND EEPROM
The RDAC register directly controls the position of the digital poten-
tiometer wiper. For example, when the RDAC register is loaded with
0x80 (AD5142A, 256 taps), the wiper is connected to half scale of
the variable resistor. The RDAC register is a standard logic register;
there is no restriction on the number of changes allowed.
It is possible to both write to and read from the RDAC register using
the digital interface (see Table 10).
The contents of the RDAC register can be stored to the EEPROM
using Command 9 (see Table 10). Thereafter, the RDAC register
always sets at that position for any future on-off-on power supply
sequence. It is possible to read back data saved into the EEPROM
with Command 3 (see Table 10).
Alternatively, the EEPROM can be written to independently using
Command 11 (see Table 13).
INPUT SHIFT REGISTER
For the AD5122A/AD5142A, the input shift register is 16 bits wide,
as shown in Figure 2. The 16-bit word consists of four control bits,
followed by four address bits and by eight data bits.
If the AD5122A RDAC or EEPROM registers are read from or
written to, the lowest data bit (Bit 0) is ignored.
Data is loaded MSB first (Bit 15). The four control bits determine the
function of the software command, as listed in Table 10 and Table
13.
Table 10. Reduced Commands Operation Truth Table
Command
Number
Control
Bits[DB15:DB12]
Address
Bits[DB11:DB8]1
Data Bits[DB7:DB0]1
Operation
C3
C2
C1
C0
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
X
X
X
X
X
X
X
X
X
X
X
X
NOP: do nothing
1
0
0
0
1
0
0
0
A0
D7
D6
D5
D4
D3
D2
D1
D0
Write contents of serial register data to
RDAC
2
0
0
1
0
0
0
0
A0
D7
D6
D5
D4
D3
D2
D1
D0
Write contents of serial register data to
input shift register
3
0
0
1
1
0
0
A1
A0
X
X
X
X
X
X
D1
D0
Read back contents
D1
D0
Data
0
1
EEPROM
1
1
RDAC
9
0
1
1
1
0
0
0
A0
X
X
X
X
X
X
X
1
Copy RDAC register to EEPROM
10
0
1
1
1
0
0
0
A0
X
X
X
X
X
X
X
0
Copy EEPROM into RDAC
14
1
0
1
1
X
X
X
X
X
X
X
X
X
X
X
X
Software reset
15
1
1
0
0
A3
0
0
A0
X
X
X
X
X
X
X
D0
Software shutdown
D0
Condition
0
Normal mode
1
Shutdown mode
1 X = don’t care.
Table 11. Reduced Address Bits Table
A3
A2
A1
A0
Channel
Stored Channel Memory
1
X1
X1
X1
All channels
Not applicable
0
0
0
0
RDAC1
RDAC1
0
0
0
1
RDAC2
Not applicable
0
0
1
0
Not applicable
RDAC2



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