M58WRxxxKU, M58WRxxxKL

Description

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The device features an Automatic Standby mode. When the bus is inactive during

Asynchronous Read operations, the device automatically switches to the Automatic Standby

outputs are still driven.

The M58WRxxxKU/L features an instant, individual block locking scheme that allows any

block to be locked or unlocked with no latency, enabling instant code and data protection. All

blocks have three levels of protection. They can be locked and locked-down individually

preventing any accidental programming or erasure. There is an additional hardware

program or erase. All blocks are locked at Power-Up.

The device includes a Protection Register to increase the protection of a system’s design.

The Protection Register is divided into two segments: a 64 bit segment containing a unique

device number written by ST, and a 128 bit segment One-Time-Programmable (OTP) by the

user. The user programmable segment can be permanently protected.

The memory is available in a VFBGA44 7.5 × 5 mm, 10 × 4 active ball array, 0.5 mm pitch

package. It is supplied with all the bits erased (set to ’1’).