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TEA1069N Datasheet(PDF) 14 Page - NXP Semiconductors |
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TEA1069N Datasheet(HTML) 14 Page - NXP Semiconductors |
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14 / 44 page ![]() 1998 Jan 08 14 Philips Semiconductors Product specification Versatile speech/dialler/ringer with music-on-hold TEA1069; TEA1069A Fig.11 Equivalent circuit of an anti-sidetone network in a Wheatstone bridge configuration. handbook, full pagewidth MSA501 - 1 IR R8 SLPE R9 R1 LN Zline VEE Zbal RA im Rt Dialler and ringer part SUPPLY VOLTAGE: PINS VDD AND VEE The power supply must be maintained for data storage. The RAM retention voltage (standby supply voltage) may drop down to 1.0 V. Applying a large capacitor across the supply terminals can retain the memory if power connections are broken. The minimum operation voltage is 2.5 V. The internal power-on reset is enabled for a voltage below this minimum operation voltage. OSCILLATOR INPUT/OUTPUT: PINS XTAL1 AND XTAL2 Time base for the TEA1069 and TEA1069A is a crystal-controlled on-chip oscillator which is completed by connecting a 3.579545 MHz crystal or ceramic resonator between XTAL1 and XTAL2. The oscillator starts when VDD reaches the operation voltage level and CE/FDI = HIGH. The following types of ceramic resonators are recommended: • Kyocera PBRC3.58ARPC10 (wired) • Kyocera KBR3.58MSATRPC10 (SMD) • Murata CSA3.58MG310VA (wired). RESET INPUT: PIN RESET Pin RESET is an input to the internal reset circuit. When RESET = HIGH, it can be used to initialize the TEA1069 and TEA1069A which is normally done by the CE/FDI input. The on-chip power-on reset generates a reset pulse if VDD drops below 2.5 V. In this event a proper start-up occurs after the supply voltage rises above the minimum operation voltage level again. During and directly after reset pins 14 to 19, 21, 29 to 32, 34 and 35 are set HIGH; pins 8, 20, 22, 26 to 28 and 33 are set to LOW. The RESET pin can be connected to VEE, preferably via a resistor of 100 k Ω to 1 MΩ, which will save leakage current. A capacitor connected to VDD can be used to extend the reset time, in case a longer reset is desirable. To prevent the dialler from reacting on voltage disturbances on the telephone line a time-out is active. The dialler returns to standby state if the voltage on the line has disappeared for more than this reset-delay time (trd). CHIP ENABLE/FREQUENCY DISCRIMINATOR INPUT: PIN CE/FDI This active HIGH input is used to initialize part of the system, to select the on-line, standby, or ringer mode and to detect line power breaks. To keep the TEA1069 and TEA1069A in the on-line mode, CE/FDI has to be HIGH. In the exchange, several AC signals can be superimposed on the DC signal, e.g. dialling tone, busy tone, disturbances (like line power breaks), and the ringer signal. The ringer signal is evaluated, and checked if its frequency is within the limits of the frequency interval as set by the diode option RFS. It is assumed that the ringer frequency at pin CE/FDI is the double of the frequency present on the telephone line. |
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