| Electronic Components Datasheet Search |
|
HD64338024 Datasheet(PDF) 87 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
HD64338024 Datasheet(HTML) 87 Page - Renesas Technology Corp |
|
87 / 697 page ![]() Section 2 CPU Rev. 7.00 Mar 10, 2005 page 45 of 652 REJ09B0042-0700 Figure 2.6 shows the instruction code format of arithmetic, logic, and shift instructions. 15 0 87 op rm rn ADD, SUB, CMP, ADDX, SUBX (Rm) [Legend] op: rm, rn: IMM: Operation field Register field Immediate data 15 0 87 op rn ADDS, SUBS, INC, DEC, DAA, DAS, NEG, NOT 15 0 87 op rn MULXU, DIVXU rm 15 0 87 rn IMM ADD, ADDX, SUBX, CMP (#XX:8) op 15 0 87 op rn AND, OR, XOR (Rm) rm 15 0 87 rn IMM AND, OR, XOR (#xx:8) op 15 0 87 rn SHAL, SHAR, SHLL, SHLR, ROTL, ROTR, ROTXL, ROTXR op Figure 2.6 Arithmetic, Logic, and Shift Instruction Codes |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |