MB95F104AJS datasheet(20/72 Pages) FUJITSU

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MB95100AM Series

■ BLOCK DIAGRAM

P80 to P83

P14/PPG0

P53/TRG1

P65/SCK

P67/SIN

PE0/INT10 to PE3/INT13

AVCC

AVSS

AVR

P52/PPG1

P50/SCL0

P51/SDA0

P40/AN08 to P43/AN11

P30/AN00 to P37/AN07

P21/PPG01

P22/TO00

P23/TO01

P24/EC0

P12/UCK0

P62/TO10

P61/PPG11

P60/PPG10

P63/TO11

P00/INT00 to P07/INT07

P10/UI0

P64/EC1

P71/TI0

P66/SOT

P70/TO0

RST

X0,X1

PG2/X1A*

PG1/X0A*

MOD, VCC, VSS, C

P13/TRG0/ADTG

P20/PPG00

P11/UO0

2 C

MC-8FX CPU

UART/SIO

16-bit PPG ch.0

8/16-bit PPG ch.0

8/10-bit

A/D converter

16-bit PPG ch.1

LIN-UART

8/16-bit PPG ch.1

ROM

RAM

Port

External interrupt ch.8 to ch.11

8/16-bit compound

timer ch.0

16-bit reload timer

8/16-bit compound

timer ch.1

Interrupt control

Wild register

Reset control

Clock control

Watch prescaler

Watch counter

External interrupt ch.0 to ch.7

* : Single clock product is general-purpose port, and dual clock product is sub clock oscillation pin.

Other pins

MB95F104AJS Datasheet(PDF) 20 Page - fujitsu semiconductor

MB95F104AJS Datasheet(HTML) 20 Page - fujitsu semiconductor

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