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TAS5815PWPR Datasheet(PDF) 48 Page - Texas Instruments |
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TAS5815PWPR Datasheet(HTML) 48 Page - Texas Instruments |
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48 / 123 page  7.5.3.2 Shutdown Procedures 1. The device is in normal operation. 2. Configure the DEVICE_CTRL2 Register [1:0]=00 (DEEP SLEEP) via the I2C control port or Pull PDN low. 3. The clocks can now be stopped and the power supplies brought down. 4. The device is now fully shutdown and powered off. I 2S I 2S I 2S I 2S 6ms 0ms PDN PVDD I 2S I 2C DVDD 4.5V 0ms I 2C I 2C I 2C Output Hiz 6ms A. Before PVDD/DVDD power down, Class D Output driver needs to be disabled by PDN or by I2C. B. At least 6ms delay needed based on: LRCLK (Fs) = 48kHz, digital volume =24dB, digital volume ramp down by 0.5dB every sample period. Changing the value of DIG_VOL_CTRL2 or DIG_VOL_CTRL3 registers or changing the or change the LRCLK rate will change the delay time. Figure 7-15. Power down sequence TAS5815 SLOSEA8 – DECEMBER 2024 www.ti.com 48 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: TAS5815 |
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