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TAS5815PWPR Datasheet(PDF) 62 Page - Texas Instruments |
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TAS5815PWPR Datasheet(HTML) 62 Page - Texas Instruments |
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62 / 123 page  8.1.10 SAP_CTRL2 Register (Offset = 34h) [Reset = 00h] SAP_CTRL2 is shown in Figure 8-10 and described in Table 8-12. Return to the Summary Table. I2S control 2 Figure 8-10. SAP_CTRL2 Register 7 6 5 4 3 2 1 0 SHIFT_LSB R/W-0h Table 8-12. SAP_CTRL2 Register Field Descriptions Bit Field Type Reset Description 7-0 SHIFT_LSB R/W 0h I2S Shift LSB These bits control the offset of audio data in the audio frame for both input and output. The offset is defined as the number of BCLK from the starting (MSB) of audio frame to the starting of the desired audio sample. 8'b00000000: offset = 0 BCLK (no offset) 8'b00000001: ofsset = 1 BCLK 8'b00000010: offset = 2 BCLKs … 8'b11111111: offset = 512 BCLKs TAS5815 SLOSEA8 – DECEMBER 2024 www.ti.com 62 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: TAS5815 |
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