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TAS5815PWPR Datasheet(PDF) 83 Page - Texas Instruments |
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TAS5815PWPR Datasheet(HTML) 83 Page - Texas Instruments |
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83 / 123 page ![]() 8.1.31 RAMP_PHASE_CTRL Register (Offset = 6Ah) [Reset = 00h] RAMP_PHASE_CTRL is shown in Figure 8-31 and described in Table 8-33. Return to the Summary Table. Switching clock phase control Figure 8-31. RAMP_PHASE_CTRL Register 7 6 5 4 3 2 1 0 RESERVED RAMPPHASE_SEL RESERVED R/W-0h R/W-0h R/W-0h Table 8-33. RAMP_PHASE_CTRL Register Field Descriptions Bit Field Type Reset Description 7-4 RESERVED R/W 0h 3-2 RAMPPHASE_SEL R/W 0h Select ramp clock phase when multi devices are integrated in one system to reduce EMI and peak supply peak current, it is recomended set all devices the same RAMP frequency and same spread spectrum. it must be set before driving device into PLAY mode if this feature is needed. 00: 0 degree 01: 45 degree 10: 90 degree 11: 135 degree all of above have a 45 degree of phase shift 1-0 RESERVED R/W 0h Use I2S to synchronize output PWM phase 0: Disable 1: Enable 0 PHASE_SYNC_EN R/W 0h 0: RAMP phase sync disable 1: RAMP phase sync enable www.ti.com TAS5815 SLOSEA8 – DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 83 Product Folder Links: TAS5815 |
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