MSC8144EC datasheet(67/80 Pages) FREESCALE

67 / 80 page

Hardware Design Considerations

MSC8144EC Quad Core Digital Signal Processor Data Sheet, Rev. 6

Freescale Semiconductor

3.4.1.2

16-Bit DDR Memory Only

Table 58 lists unused pin connection when using 16-bit DDR memory. The 16 most significant data lines are not used.

ECC_MDQS

MVREF

GND

VDDDDR

GND

Note:

If the DDR controller is not used, disable the internal DDR clock by writing a 1 to the CLK11DIS bit in the System Clock Control

Table 57. Connectivity of DDR Related Pins When Using 16-bit DDR Memory Only

Signal Name

Pin connection

MDQ[0–15]

in use

MDQ[16–31]

pull-up to VDDDDR

MDQS[0–1]

in use

MDQS[2–3]

pull-down to GND

MDQS[0–1]

in use

MDQS[2–3]

pull-up to VDDDDR

MA[0–15]

in use

MCK[0–2]

in use

MCK[0–2]

in use

MCS[0–1]

in use

MDM[0–1]

in use

MDM[2–3]

MBA[0–2]

in use

MCAS

in use

MCKE[0–1]

in use

MODT[0–1]

in use

MDIC[0–1]

in use

MRAS

in use

MWE

in use

MVREF

1/2*VDDDDR

VDDDDR

2.5 V or 1.8 V

Table 56. Connectivity of DDR Related Pins When the DDR Interface Is Not Used (continued)

Signal Name

Pin Connection

MSC8144EC Datasheet(PDF) 67 Page - Freescale Semiconductor, Inc

MSC8144EC Datasheet(HTML) 67 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80

Datasheet Download

Link URL