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STM32L496QGI3 Datasheet(PDF) 164 Page - STMicroelectronics

Part # STM32L496QGI3
Description  Ultra-low-power ARM® Cortex®-M4 32-bit MCUFPU, 100DMIPS, up to 1MB Flash, 320KB SRAM, USB OTG FS, audio, ext. SMPS
PDF  262 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L496QGI3 Datasheet(HTML) 164 Page - STMicroelectronics

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Electrical characteristics
STM32L496xx
164/262
DocID029173 Rev 1
Static latch-up
Two complementary static tests are required on six parts to assess the latch-up
performance:
•
A supply overvoltage is applied to each power supply pin.
•
A current injection is applied to each input, output and configurable I/O pin.
These tests are compliant with EIA/JESD 78A IC latch-up standard.
6.3.13
I/O current injection characteristics
As a general rule, current injection to the I/O pins, due to external voltage below VSS or
above VDDIOx (for standard, 3.3 V-capable I/O pins) should be avoided during normal
product operation. However, in order to give an indication of the robustness of the
microcontroller in cases when abnormal injection accidentally happens, susceptibility tests
are performed on a sample basis during device characterization.
Functional susceptibility to I/O current injection
While a simple application is executed on the device, the device is stressed by injecting
current into the I/O pins programmed in floating input mode. While current is injected into
the I/O pin, one at a time, the device is checked for functional failures.
The failure is indicated by an out of range parameter: ADC error above a certain limit (higher
than 5 LSB TUE), out of conventional limits of induced leakage current on adjacent pins (out
of the -5 µA/+0 µA range) or other functional failure (for example reset occurrence or
oscillator frequency deviation).
The characterization results are given in Table 69.
Negative induced leakage current is caused by negative injection and positive induced
leakage current is caused by positive injection.
Table 68. Electrical sensitivities
Symbol
Parameter
Conditions
Class
LU
Static latch-up class
TA = +105 °C conforming to JESD78A
II level A(1)
1. Negative injection is limited to -30 mA for PF0, PF1, PG6, PG7, PG8, PG12, PG13, PG14.
Table 69. I/O current injection susceptibility
Symbol
Description
Functional
susceptibility
Unit
Negative
injection
Positive
injection
IINJ(1)
1. Guaranteed by characterization.
Injected current on all pins except PA4, PA5, PB0, PF12,
PF13, OPAMP1_V1NM, OPAMP2_V1NM
-5
NA
mA
Injected current on pins PB0, PF12, PF13
0
NA
Injected current on OPAMP1_V1NM, OPAMP2_V1NM
0
0
Injected current on PA4, PA5 pins
-5
0



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