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STM32L496QGI3 Datasheet(PDF) 203 Page - STMicroelectronics

Part # STM32L496QGI3
Description  Ultra-low-power ARM® Cortex®-M4 32-bit MCUFPU, 100DMIPS, up to 1MB Flash, 320KB SRAM, USB OTG FS, audio, ext. SMPS
PDF  262 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L496QGI3 Datasheet(HTML) 203 Page - STMicroelectronics

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STM32L496xx
Electrical characteristics
235
6.3.27
Communication interfaces characteristics
I2C interface characteristics
The I2C interface meets the timings requirements of the I2C-bus specification and user
manual rev. 03 for:
•
Standard-mode (Sm): with a bit rate up to 100 kbit/s
•
Fast-mode (Fm): with a bit rate up to 400 kbit/s
•
Fast-mode Plus (Fm+): with a bit rate up to 1 Mbit/s.
The I2C timings requirements are guaranteed by design when the I2C peripheral is properly
configured (refer to RM0351 reference manual).
The SDA and SCL I/O requirements are met with the following restrictions: the SDA and
SCL I/O pins are not “true” open-drain. When configured as open-drain, the PMOS
connected between the I/O pin and VDDIOx is disabled, but is still present. Only FT_f I/O pins
support Fm+ low level output current maximum requirement. Refer to Section 6.3.14: I/O
port characteristics for the I2C I/Os characteristics.
All I2C SDA and SCL I/Os embed an analog filter. Refer to the table below for the analog
filter characteristics:
Table 94. I2C analog filter characteristics(1)
1. Guaranteed by design.
Symbol
ParameterMin
Max
Unit
tAF
Maximum pulse width of spikes
that are suppressed by the analog
filter
50(2)
2. Spikes with widths below tAF(min) are filtered.
260(3)
3. Spikes with widths above tAF(max) are not filtered
ns



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