STM32L496QGI3 datasheet(220/262 Pages) STMICROELECTRONICS

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Electrical characteristics

STM32L496xx

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DocID029173 Rev 1

Table 106. Asynchronous multiplexed PSRAM/NOR read timings(1)(2)

1. CL = 30 pF.

2. Guaranteed by characterization results.

Symbol

Parameter

Min

Max

Unit

tw(NE)

FMC_NE low time

3THCLK -1

3THCLK+1

tv(NOE_NE) FMC_NEx low to FMC_NOE low

2THCLK

2THCLK+0.5

tw(NOE)

FMC_NOE low time

THCLK - 1

THCLK+1

th(NE_NOE) FMC_NOE high to FMC_NE high hold time

tv(A_NE)

FMC_NEx low to FMC_A valid

0.5

tv(NADV_NE) FMC_NEx low to FMC_NADV low

0.5

tw(NADV)

FMC_NADV low time

THCLK - 0.5

THCLK+1

th(AD_NADV)

FMC_AD(address) valid hold time after

FMC_NADV high

THCLK + 0.5

th(A_NOE)

Address hold time after FMC_NOE high

THCLK - 0.5

th(BL_NOE) FMC_BL time after FMC_NOE high

tv(BL_NE)

FMC_NEx low to FMC_BL valid

0.5

tsu(Data_NE) Data to FMC_NEx high setup time

THCLK-1

tsu(Data_NOE) Data to FMC_NOE high setup time

THCLK-1

th(Data_NE) Data hold time after FMC_NEx high

th(Data_NOE) Data hold time after FMC_NOE high

Table 107. Asynchronous multiplexed PSRAM/NOR read-NWAIT timings(1)(2)

1. CL = 30 pF.

2. Guaranteed by characterization results.

Symbol

Parameter

Min

Max

Unit

tw(NE)

FMC_NE low time

8THCLK+ 1

tw(NOE)

FMC_NWE low time

5THCLK - 1.5 5THCLK+ 0.5

tsu(NWAIT_NE)

FMC_NWAIT valid before FMC_NEx high

5THCLK +0.5

th(NE_NWAIT)

FMC_NEx hold time after FMC_NWAIT invalid

4THCLK+1

STM32L496QGI3 Datasheet(PDF) 220 Page - STMicroelectronics

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