12

12 Magnova datasheet version 1.10, June 5th, 2025

Magnova datasheet version 1.10, June 5th, 2025, www.batronix.com/magnova

www.batronix.com/magnova

Batronix GmbH & Co. KG,

Batronix GmbH & Co. KG, Handelsweg 16,

Handelsweg 16, 24211 Preetz,

24211 Preetz, Germany,

Germany, Tel +49

Tel +49 4342 90786-0,

4342 90786-0, service@batronix.com

service@batronix.com

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Decoding

Decoder channels

4

Sources for all decoders

Analog channels CH1-CH4

Digital channels D0-D15

Threshold settings

Separate upper and lower threshold settings for each analog

channel. At digital channels same level as set for the logic

probe.

I2C

Clock settings: Source, slope

Data settings: Source, active high/low

SPI

Chip select settings: Source or none (timeout), active high/low

Clock settings: Source, slope

MOSI and MISO settings: Source or none, active high/low

Timeout: 0 up to 1 ks

Bits: 1 up to 128

Bit order: MSB, LSB

UART

Rx/Tx settings: Source, active high/low

Baud rate: 1 up to 10 Mbps

Parity: None, even, odd, mark, space

Stop bits: 1, 1.5, 2

Bits: 4 up to 32

Bit order: MSB, LSB

CAN (CAN-FD)

Source Type: CAN-H, CAN-L

Baud rate: 1 bps up to 1 Mbps

Data baud rate at CAN-FD: 1 bps up to 8 Mbps

LIN

Channel: Source, active high/low

Version: 1.x, 2.x/J2602

Baud rate: 1 bps up to 8 Mbps

Parallel

Clock: Source or none (timeout), slope

Data: Source, active high/low

Bits: 1 up to 20

Number format

Binary, decimal, hexadecimal, ASCII

Features

Decoder table with time, type, address, data, error display.

Import/Export to trigger system.

For trigger possibilities see “trigger system” above.