AFE5803 datasheet(46/53 Pages) TI2

46 / 53 page

AFE5803

SLOS763A

– JANUARY 2012 – REVISED JANUARY 2012

www.ti.com

The digital beam-forming algorithm in an ultrasound system relies on gain matching across all receiver channels.

A typical system would have about 12 octal AFEs on the board. In such a case, it is critical to ensure that the

gain is matched, essentially requiring the reference voltages seen by all the AFEs to be the same. Matching

references within the eight channels of a chip is done by using a single internal reference voltage buffer.

Trimming the reference voltages on each chip during production ensures that the reference voltages are

well-matched across different chips. When the external reference mode is used, a solid reference plane on a

printed circuit board can ensure minimal voltage variation across devices. More information on voltage reference

design can be found in the document SLYT339. The dominant gain variation in the AFE5803 comes from the

VCA gain variation. The gain variation contributed by the ADC reference circuit is much smaller than the VCA

gain variation. Hence, in most systems, using the ADC internal reference mode is sufficient to maintain good gain

matching among multiple AFE5803s. In addition, the internal reference circuit without any external components

achieves satisfactory thermal noise and phase noise performance.

POWER MANAGEMENT

Power/Performance Optimization

The AFE5803 has options to adjust power consumption and meet different noise performances. This feature

would be useful for portable systems operated by batteries when low power is more desired. See the electrical

characteristics table as well as the typical characteristic plots.

Power Management Priority

Power management plays a critical role to extend battery life and ensure long operation time. The AFE5803 has

fast and flexible power down/up control which can maximize battery life. The AFE5803 can be powered down/up

through external pins or internal registers. The following table indicates the affected circuit blocks and priorities

when the power management is invoked. The higher priority controls can overwrite the lower priority ones.In the

device, all the power down controls are logically ORed to generate final power down for different blocks. Thus,

the higher priority controls can cover the lower priority ones. The AFE5803 register settings are maintained when

the AFE5803 is in either partial power down mode or complete power down mode.

Table 11. Power Management Priority

Name

Blocks

Priority

PDN_GLOBAL

All

High

PDN_VCA

LNA + VCAT+ PGA

Medium

VCA_PARTIAL_PDN

LNA + VCAT+ PGA

Low

VCA_COMPLETE_PDN

LNA + VCAT+ PGA

Medium

PDN_ADC

ADC

Medium

ADC_PARTIAL_PDN

ADC

Low

ADC_COMPLETE_PDN

ADC

Medium

PDN_VCAT_PGA

VCAT + PGA

Lowest

PDN_LNA

LNA

Lowest

Partial Power-Up/Down Mode

The partial power up/down mode is also called as fast power up/down mode. In this mode, most amplifiers in the

signal path are powered down, while the internal reference circuits remain active as well as the LVDS clock

circuit, i.e. the LVDS circuit still generates its frame and bit clocks.

The partial power down function allows the AFE5803 to be wake up from a low-power state quickly. This

configuration ensures that the external capacitors are discharged slowly; thus a minimum wake-up time is

needed as long as the charges on those capacitors are restored. The VCA wake-up response is typically about 2

μs or 1% of the power down duration whichever is larger. The longest wake-up time depends on the capacitors

connected at INP and INM, as the wake-up time is the time required to recharge the caps to the desired

operating voltages. For 0.1

μF at INP and 15nF at INM can give a wake-up time of 2.5ms. For larger capacitors

this time will be longer. The ADC wake-up time is about 1

μs. Thus the AFE5803 wake-up time is more

dependent on the VCA wake-up time. This also assumes that the ADC clock has been running for at least 50

µs

before normal operating mode resumes. The power-down time is instantaneous, less than 1.0

µs.

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