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AFE5803 Datasheet(PDF) 8 Page - Texas Instruments |
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AFE5803 Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 53 page ![]() AFE5803 SLOS763A – JANUARY 2012 – REVISED JANUARY 2012 www.ti.com ELECTRICAL CHARACTERISTICS (continued) AVDD_5 V = 5 V, AVDD = 3.3 V, AVDD_ADC = 1.8 V, DVDD = 1.8 V, AC-coupled with 0.1 µF at INP and bypassed to ground with 15nF at INM, No active termination, VCNTL = 0 V, fIN = 5 MHz, LNA = 18 dB, PGA = 24 dB, 14Bit, sample rate = 65 MSPS, LPF Filter = 15 MHz, low noise mode, VOUT = –1 dBFS, ADC configured in internal reference mode, single-ended VCNTL mode, VCNTLM = GND, at ambient temperature TA = 25°C, unless otherwise noted. Min and max values are specified across full-temperature range with AVDD_5 V = 5 V, AVDD = 3.3 V, AVDD_ADC = 1.8 V, DVDD = 1.8 V PARAMETER TEST CONDITION MIN TYP MAX UNITS POWER DISSIPATION AVDD Voltage 3.15 3.3 3.6 V AVDD_ADC Voltage 1.7 1.8 1.9 V AVDD_5V Voltage 4.75 5 5.5 V DVDD Voltage 1.7 1.8 1.9 V TGC low noise mode, 65 MSPS 158 190 TGC low noise mode, 40 MSPS 145 Total power dissipation per channel mW/CH TGC medium power mode, 40 MSPS 114 TGC low power mode, 40 MSPS 101.5 TGC low noise mode, no signal 202 240 TGC medium power mode, no signal 126 TGC low power mode, no signal 99 AVDD (3.3V) Current mA TGC low noise mode, 500 mVPP Input,1% duty cycle 210 TGC medium power mode, 500 mVPP Input, 1% duty cycle 133 TGC low power, 500 mVPP Input, 1% duty cycle 105 TGC mode no signal 25.5 35 AVDD_5V Current mA TGC mode, 500 mVPP Input,1% duty cycle 16.5 TGC low noise mode, no signal 99 121 TGC medium power mode, no signal 68 TGC low power mode, no signal 55.5 VCA Power dissipation mW/CH TGC low noise mode, 500 mVPP input,1% duty cycle 102.5 TGC medium power mode, 500 mVPP Input, 1% duty cycle 71 TGC low power mode, 500 mVPP input,1% duty cycle 59.5 AVDD_ADC(1.8V) Current 65 MSPS 187 205 mA DVDD(1.8V) Current 65 MSPS 77 110 mA 65 MSPS 59 69 50 MSPS 51 ADC Power dissipation/CH mW/CH 40 MSPS 46 20 MSPS 35 Power dissipation in power down mode PDN_VCA = High, PDN_ADC = High 25 mW/CH Complete power-down PDN_Global=High 0.6 Power-down response time Time taken to enter power down 1 µs Power-up response time VCA power down 2 µs+1% of PDN time µs ADC power down 1 Complete power down 2.5 ms fin = 5 MHz, at 50 mVpp noise at 1 KHz on supply (2) –65 dBc Power supply modulation ratio, AVDD and AVDD_5V fin = 5 MHz, at 50 mVpp noise at 50 KHz on supply (2) –65 dBc Power supply rejection ratio f = 10 kHz,VCNTL = 0 V (high gain), AVDD –40 dBc f = 10 kHz,VCNTL = 0 V(high gain), AVDD_5V –55 dBc f = 10 kHz,VCNTL = 1 V (low gain), AVDD –50 dBc (2) PSMR specification is with respect to input signal amplitude. 8 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): AFE5803 |
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