www.ti.com

UDG-01069

8

4

V

REF

R

T

/ C

T

UCC28C42

PWM

R

T

C

T

24

SYNCHRONIZATION

CIRCUIT INPUT

ON .

LOW

LOW

HIGH

ON .

OFF .

CLOCK

INPUT

PWM

OUT

UPPER THRESHOLD

LOWER THRESHOLD

OUTPUT A

COMBINED

UPPER THRESHOLD

LOWER THRESHOLD

V

CT

V

CT (ANALOG)

V

SYNC (DIGITAL)

UDG−01070

Precautions

Circuit Applications

UCC28C4x-EP

BiCMOS LOW-POWER CURRENT-MODE PWM CONTROLLERS

SGLS352B – DECEMBER 2006 – REVISED MAY 2007

APPLICATION INFORMATION (continued)

Figure 2. Oscillator Synchronization Circuit

Figure 3. Synchronization to an External Clock

The absolute maximum supply voltage is 20 V, including any transients that may be present. If this voltage is

exceeded, device damage is likely. This is in contrast to the predecessor bipolar devices that could survive up to

30 V. Thus, the supply pin should be decoupled as close to the ground pin as possible. Also, since no clamp is

included in the device, the supply pin should be protected from external sources that could exceed the 20 V

level.

Careful layout of the printed board has always been a necessity for high-frequency power supplies. As the

device switching speeds and operating frequencies increase, the layout of the converter becomes increasingly

important.

This 8-pin device has only a single ground for the logic and power connections. This forces the gate drive

current pulses to flow through the same ground that the control circuit uses for reference. Thus, the interconnect

inductance should be minimized as much as possible. One implication is to place the device (gate driver)

circuitry close to the MOSFET it is driving. Note that this can conflict with the need for the error amplifier and the

feedback path to be away from the noise generating components.

Figure 4 shows a typical off-line application.

9

Submit Documentation Feedback