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LM8333GGR8AXS/NOPB Datasheet(PDF) 13 Page - Texas Instruments |
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LM8333GGR8AXS/NOPB Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 26 page ![]() LM8333 www.ti.com SNLS246K – SEPTEMBER 2006 – REVISED MAY 2013 Figure 12. LM8333 Responds with NACK, Host Retries Command Interrupts INTERRUPT CODE The interrupt code is read and acknowledged with the READ_INT command (0xD0). This command clears the code and deasserts the IRQ output. Table 6 shows the format of the interrupt code. Note that when only one of the interrupt-capable pins GEN_IO_0 or GEN_IO_1 is configured as an interrupt input, bits 1 and 2 are both set when an interrupt occurs. When both GEN_IO_0 and GEN_IO_1 pins are configured as interrupt inputs, only one bit corresponding to the interrupt source is set when an interrupt occurs. Table 6. Interrupt Code 7 6 5 4 3 2 1 0 0 0 0 0 ERROR EX_1 EX_0 KEYPAD Bit Description ERROR An error condition occurred. EX_1 A rising or falling edge was detected on GEN_IO_1. EX_0 A rising or falling edge was detected on GEN_IO_0. KEYPAD A key-press or key-release event occurred. ERROR CODE If the LM8333 reports an error, the READ_ERROR command (0xF0) is used to read and clear the error code. Table 7 shows the format of the error code. Table 7. Error Code 7 6 5 4 3 2 1 0 0 FIFOOVR 0 NOINT 0 KEYOVR CMDUNK CMDOVR Bit Description FIFOOVR Key event occurred while the FIFO was full. NOINT Interrupt deasserted before it could be serviced. KEYOVR More than two keys were pressed simultaneously. CMDUNK Not a valid command. CMDOVR Command received before it could be accepted, e.g. after wake-up. Copyright © 2006–2013, Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Links: LM8333 |
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