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LM8333GGR8AXS/NOPB Datasheet(PDF) 9 Page - Texas Instruments

Part # LM8333GGR8AXS/NOPB
Description  LM8333 Mobile I/O Companion Supporting Key-Scan, I/O Expansion, PWM, and ACCESS.bus Host Interface
PDF  26 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

LM8333GGR8AXS/NOPB Datasheet(HTML) 9 Page - Texas Instruments

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LM8333
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SNLS246K – SEPTEMBER 2006 – REVISED MAY 2013
Figure 7. General-Purpose I/O Control Commands
Table 4 shows the pin configuration for all four combinations of control bit settings (data output and direction) for
the general-purpose I/O pins. GEN_IO_3 cannot be put into the high impedance (Hi-Z) input mode. When
programmed as an input, it can only be configured as an input with a weak pullup.
Table 4. General Purpose I/O Pin Configuration
GEN_IO_DIR Bit
GEN_IO_OUT Bit
Direction
State
0
0
Input
Hi-Z
0
1
Input
Weak Pullup
1
0
Output
Drive Low
1
1
Output
Drive High
External Interrupts
When the GEN_IO_0 or GEN_IO_1 pins are configured as inputs, a SET_EXT_INT command (0xD1) can be
used to enable receiving external interrupts on either or both of these pins. Setting the EX_0 or EX_1 bits in the
data byte of the SET_EXT_INT command (as shown in Figure 8) enables the corresponding pin as an external
interrupt input. When enabled as an interrupt input, any rising or falling edge causes the IRQ output to be
asserted. If the LM8333 was in Halt mode, it also wakes up into Active mode.
Figure 8. SET_EXT_INT Command Data Byte
When both GEN_IO_0 and GEN_IO_1 are configured as interrupt inputs, bits 1 and 2 of the interrupt code
indicate which input asserted the interrupt. However, if only one of GEN_IO_0 or GEN_IO_1 is configured as an
interrupt input, both bits 1 and 2 of the interrupt code will be set when an interrupt occurs.
Copyright © 2006–2013, Texas Instruments Incorporated
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