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AR0130CSSC00SPBA0-DP1 Datasheet(PDF) 16 Page - ON Semiconductor |
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AR0130CSSC00SPBA0-DP1 Datasheet(HTML) 16 Page - ON Semiconductor |
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16 / 40 page ![]() AR0130CS www.onsemi.com 16 Figure 14. Exit Standby Timing E X T C L K S T AN DB Y F V T R IG G E R 10 E X T C L K s 1ms 28 rows + CIT S DAT A Register Writes Not Valid Register Writes Valid Hard Standby Hard Standby puts the sensor in lower power state; previously written register settings are still maintained. A specific sequence needs to be followed to enter and exit from Hard Standby. To Enter Hard Standby: 1. R0x301A[8] = 1 2. R0x301A[12] = 1 if serial mode was used 3. Assert STANDBY pin 4. External clock can be turned off to further minimize power consumption (Optional) To Exit Hard Standby: 1. Enable external clock if it was turned off 2. De−assert STANDBY pin 3. Set R0x301A[8] = 0 Window Control Registers x_addr_start, x_addr_end, y_addr_start, and y_addr_end control the size and starting coordinates of the image window. The exact window height and width out of the sensor is determined by the difference between the Y address start and end registers or the X address start and end registers, respectively. The AR0130 allows different window sizes for context A and context B. Blanking Control Horizontal blank and vertical blank times are controlled by the line_length_pck and frame_length_lines registers, respectively. • Horizontal blanking is specified in terms of pixel clocks. It is calculated by subtracting the X window size from the line_length_pck register. The minimum horizontal blanking is 110 pixel clocks. • Vertical blanking is specified in terms of numbers of lines. It is calculated by subtracting the Y window size from the frame_length_lines register. The minimum vertical blanking is 26 lines. The actual imager timing can be calculated using Table 4 and Table 5, which describe the Line Timing and FV/LV signals. Readout Modes Digital Binning By default, the resolution of the output image is the full width and height of the FOV as defined above. The output resolution can be reduced by digital binning. For RGB and monochrome mode, this is set by the register R0x3032. For Context A, use bits [1:0], for Context B, use bits [5:4]. Available settings are: 00 = No binning 01 = Horizontal binning 10 = Horizontal and vertical binning Binning gives the advantage of reducing noise at the cost of reduced resolution. When both horizontal and vertical binning are used, a 2x improvement in SNR is achieved therefore improving low light performance Bayer Space Resampling All of the pixels in the FOV contribute to the output image in digital binning mode. This can result in a more pleasing output image with reduced subsampling artifacts. It also improves low−light performance. For RGB mode, resampling can be enabled by setting of register 0x306E[4] = 1. Mirror Column Mirror Image By setting R0x3040[14] = 1, the readout order of the columns is reversed, as shown in Figure 15. The starting color, and therefore the Bayer pattern, is preserved when mirroring the columns. |
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