C

C

TG

C

C

TG

C

C

C

C

C

CLK

D

Q

C

TG

TG

2

1

4

11

SN74LVC1G80

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SCES221S – APRIL 1999 – REVISED NOVEMBER 2016

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8 Detailed Description

8.1 Overview

The SN74LVC1G80 is a single positive-edge-trigger D-type flip-flop. Data at the input (D) is transferred to the

output (Q) on the positive-going edge of the clock pulse when the setup time requirement is met. Because the

clock triggering occurs at a voltage level, it is not directly related to the rise time of the clock pulse. This allows

for data at the input to be changed without affecting the level at the output, following the hold-time interval.

8.2 Functional Block Diagram

Figure 4. Logic Diagram (Positive Logic)

8.3 Feature Description

This device has a wide operating VCC range of 1.65 V to 5.5 V. The wide operating range allows for a broad

range of systems the device can be used in. The output can handle This device is full specified for partial-power-

down applications. When VCC = 0, the Ioff circuitry disables the outputs, preventing damaging current backflow

through the device.

8.4 Device Functional Modes

Table 1 lists the functional modes of the SN74LVC1G80.

Table 1. Function Table

INPUTS

OUTPUT

Q

CLK

D

↑

H

L

↑

L

H

L

X

Q0