A3

A1

C3

C1

B2

IN

OUT

GND

NR

EN

3

2

4

5

6

1

GND

OUT

NR

FB

EN

IN

Adjustable Voltage Version

3

2

4

5

1

GND

OUT

NR

EN

IN

Fixed Voltage Versions

TPS730

www.ti.com

SBVS054J – NOVEMBER 2004 – REVISED APRIL 2015

5 Pin Configuration and Functions

DBV Package

DBV Package

5-Pin SOT-23

6-Pin SOT-23

Top View

Top View

YZQ Package

5-Pin DSBGA

Top View

Pin Functions

PIN

NO.

I/O

DESCRIPTION

NAME

SOT-23

DSBGA

Enable pin. Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts

EN

3

A3

I

the regulator into shutdown mode. EN can be connected to IN if not used.

Feedback pin. This terminal is the feedback input pin for the adjustable device. Fixed-voltage

FB

5

N/A

I

versions in the DBV package do not have this pin.

GND

2

A1

—

Regulator ground.

IN

1

C3

I

Input to the device.

OUT

6

C1

O

Output of the regulator.

Noise Reduction pin. Connecting an external capacitor to this pin filters noise generated by

NR

4

B2

—

the internal bandgap. This configuration improves power-supply rejection and reduces output

noise.

Copyright © 2004–2015, Texas Instruments Incorporated

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